Efficient pattern mapping for deterministic logic BIST

Efficient pattern mapping for deterministic logic BIST
复制标题

确定性逻辑 BIST 的高效模式映射

DOI:
--
复制
发表时间:
2004
期刊:
2004 International Conferce on Test
影响因子:
--
通讯作者:
Michael Garbers
Michael Garbers
中科院分区:
--
文献类型:
--
作者:
V. Gherman;H. Wunderlich;H. Vranken;F. Hapke;M. Wittke;Michael Garbers

文献摘要

被引文献

相似文献

确定性逻辑内建自测试(DLBIST)结合了确定性外部测试和伪随机LBIST的优点,是一种很有吸引力的测试策略。不幸的是,先前公布的DLBIST方法不适合于大型IC,因为DLBIST合成算法的计算时间和存储器消耗随电路尺寸呈指数或至少立方地增加。在本文中,我们提出了一种新的DLBIST合成过程,具有几乎线性的计算时间和内存消耗方面的复杂性。新的算法是基于二叉决策图(BDDs)。我们证明了高达2M门的工业设计的新算法的效率。
Deterministic logic BIST (DLBIST) is an attractive test strategy, since it combines advantages of deterministic external testing and pseudo-random LBIST. Unfortunately, previously published DLBIST methods are unsuited for large ICs, since computing time and memory consumption of the DLBIST synthesis algorithms increase exponentially, or at least cubically, with the circuit size. In this paper, we propose a novel DLBIST synthesis procedure that has nearly linear complexity in terms of both computing time and memory consumption. The new algorithms are based on binary decision diagrams (BDDs). We demonstrate the efficiency of the new algorithms for industrial designs up to 2M gates.