Low‐temperature SOI (Si‐on‐insulator) formation by lateral solid‐phase epitaxy
Low‐temperature SOI (Si‐on‐insulator) formation by lateral solid‐phase epitaxy
复制标题
横向固相外延低温SOI（绝缘体上硅）形成
DOI：
10.1063/1.341565
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发表时间：
1988
影响因子：
3.2
通讯作者：
W. Sinke
中科院分区：
文献类型：
--
作者：
M. Miyao;M. Moniwa;K. Kusukawa;W. Sinke
研究了用固相工艺低温(550-600 °C)形成绝缘体上硅结构。微探针(μ)反射高能电子衍射观察表明，在固相外延中，定向晶体生长是从种子区开始的。考察了随机成核、外延取向和局域掺杂对横向(L)固相外延的影响。结果，在绝缘区获得了一个较大的L-固相外延面积，距离播种面积14μm。采用μ-拉曼光谱和场效应晶体管制作技术对L固相外延层的晶体质量和电学性能进行了研究。获得了与体硅相当的小应力场2.5×109dyn/cm~2和高电子迁移率720cm2/V S。
Low‐temperature (550–600 °C) formation of a Si‐on‐insulator structure by a solid‐phase process is investigated. A microprobe (μ) reflection high‐energy electron diffraction observation reveals that oriented crystal growth propagates from the seeding area in solid‐phase epitaxy (SPE). The effects of random nucleation, epitaxial alignment, and local doping on lateral (L)‐SPE are examined. As a result, a relatively large L‐SPE area, 14 μm from the seeding area, is achieved on insulating regions. Crystal quality and electrical properties of L‐SPE layers are examined using μ‐Raman spectroscopy and field‐effect transistor fabrication. A small stress field, 2.5×109 dyn/cm2, and high electron mobility, 720 cm2/V s, comparable to that of bulk Si are obtained.