A 1V 17.9dBm 60GHz power amplifier in standard 65nm CMOS
A 1V 17.9dBm 60GHz power amplifier in standard 65nm CMOS
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DOI：
10.1109/isscc.2010.5433870
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发表时间：
2010-03
期刊：
影响因子：
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通讯作者：
J. Lai;A. Valdes-Garcia
中科院分区：
文献类型：
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作者：
J. Lai;A. Valdes-Garcia
对于单天线移动设备中的点对点多Gb/S应用，低成本、高度集成的解决方案是首选，而cmos技术是毫米波SoC产品的候选者。为了向用户提供几乎全向的链路，TX功率要求可能会相当高。假设接收器在链路两端具有7dBnF和1dBI天线，则在1米距离上传输60 GHz信号所需的功率为10dBm。因此，对于3 Gb/S QPSK信号，如果增加3dBm的功率回退，则需要能够提供13dBm OP1db的功率放大器(PA)。本文提出了一种满足这些要求的CMOS型功放。
For point-to-point multi-Gb/s applications in mobile devices with single antennas, low-cost, highly integrated solutions are preferred, and CMOS technology is a candidate for mm-Wave SoC products. To provide users with nearly omni-directional links, the TX power requirement could be considerably high. Assuming a receiver with 7dB NF, and 1dBi antennas at both ends of the link, the required power to transmit a 60GHz signal over 1m distance is 10dBm. A power amplifier (PA) that is capable of delivering 13dBm OP1dB for a 3Gb/s QPSK signal is thus needed if 3dB power back-off is added. This paper presents a CMOS PA meeting these requirements.