Venus: A Versatile Deep Neural Network Accelerator Architecture Design for Multiple Applications
Venus: A Versatile Deep Neural Network Accelerator Architecture Design for Multiple Applications
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DOI：
10.1109/dac56929.2023.10247897
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发表时间：
2023-07
期刊：
影响因子：
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通讯作者：
Jiaqi Yang;Yang;Jiaqi;Cute
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文献类型：
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作者：
Jiaqi Yang;Yang;Jiaqi;Cute
深度神经网络（DNN）的应用非常普遍。然而，随着对这些应用程序的需求不断增加，为多应用程序实现设计灵活且可扩展的体系结构也面临着挑战。这种加速器需要具有灵活的片上网络（NoC）、并行性开发和更好的片上存储器组织的创新架构，以充分支持各种计算、存储器和通信需求。在本文中，我们提出了Venus，这是一种多功能DNN加速器设计，可以为多应用提供高效的通信和计算支持。Venus是一种基于瓦片的架构，具有分布式缓冲区，其中每个瓦片由处理元件（PE）阵列和分布式缓冲区的一部分组成。Venus的另一个突出特点是灵活的片上网络（NoC），可以动态适应各种运行应用程序的通信需求，从而最大限度地提高数据重用，减少DRAM访问，并支持多个并行计算，总体目标是更好的执行时间和更好的能源效率。仿真结果表明，我们提出的Venus设计优于最先进的加速器（NVDLA [1]，ShiDianNao [2]，Eyeriss [3]，Planaria [4]，Simba [5]）。
Deep Neural Network (DNN) applications are pervasive. However as demands for these applications continue to increase, so is the challenges for designing flexible and scalable architectures for multi-application implementation. Such accelerators require innovative architecture with flexible Network-on-Chips (NoCs), parallelism exploitation, and better on-chip memory organization to adequately support the diverse computation, memory, and communication needs. In this paper, we propose Venus, a versatile DNN accelerator design that can provide efficient communication and computation support for multi-applications. Venus is a tile-based architecture with a distributed buffer where each tile consists of an array of processing elements (PEs) and a portion of the distributed buffer. The other salient feature of Venus is a flexible Network-on-Chip (NoC) that can dynamically adapt to the communication needs of various running applications thus maximizing data reuse, reducing DRAM accesses, and supporting multiple dataflows with an overall aim of better execution time and better energy efficiency. Simulation results show that our proposed Venus design outperforms state-of-art accelerators (NVDLA [1], ShiDianNao [2], Eyeriss [3], Planaria [4], Simba [5]).