Modeling the effects of temporal proximity of input transitions on gate propagation delay and transition time
Modeling the effects of temporal proximity of input transitions on gate propagation delay and transition time
复制标题
模拟输入转换的时间接近度对门传播延迟和转换时间的影响
DOI：
10.1109/dac.1996.545649
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发表时间：
1996
期刊：
影响因子：
--
通讯作者：
K. Sakallah
中科院分区：
文献类型：
--
作者：
V. Chandramouli;K. Sakallah
虽然具有单个开关输入的门的延迟建模已经受到相当大的关注，但在文献中才刚刚开始讨论多个输入在时间上非常接近地切换的情况。输入转换的接近性对延迟和输出转换时间的影响可能很大。解决这一问题的少数尝试是基于串并晶体管折叠方法，该方法将多输入门减少到逆变器。这就把这项技术限制在了cmos技术上。此外，它们都没有讨论如何选择合适的电压阈值来测量多输入门的延迟。在本文中，我们首先提出了一种选择多输入门的电压阈值的方法，该方法确保在所有输入条件下延迟值均为正值。接下来，我们引入了一个双输入接近模型，用于只有两个门的输入在切换的情况。然后，我们提出了一种简单的近似算法来计算延迟和输出转换时间，该算法重复使用双输入邻近模型，而不将门折叠成等效的反相器。与仿真结果的比较表明，该方法在实际应用中取得了良好的效果。
While delay modeling of gates with a single switching input has received considerable attention, the case of multiple inputs switching in close temporal proximity is just beginning to be addressed in the literature. The effect of proximity of input transitions can be significant on the delay and output transition time. The few attempts that have addressed this issue are based on a series-parallel transistor collapsing method that reduces the multi-input gate to an inverter. This limits the technique to CMOS technology. Moreover, none of them discuss the appropriate choice of voltage thresholds to measure delay for a multi-input gate. In this paper, we first present a method for the choice of voltage thresholds for a multi-input gate that ensures a positive value of delay under all input conditions. We next introduce a dual-input proximity model for the case when only two inputs of the gate are switching. We then propose a simple approximate algorithm for calculating the delay and output transition time that makes repeated use of the dual-input proximity model without collapsing the gate into an equivalent inverter. Comparison with simulation results shows that our method performs quite well in practice.