Design of High Performance Si/SiGe Heterojunction Tunneling FETs with a T-Shaped Gate.
Design of High Performance Si/SiGe Heterojunction Tunneling FETs with a T-Shaped Gate.
复制标题
具有 T 形栅极的高性能 Si/SiGe 异质结隧道 FET 的设计
DOI：
10.1186/s11671-017-1958-3
复制
发表时间：
2017-12
影响因子：
--
通讯作者：
Yang Z
中科院分区：
文献类型：
--
作者：
Li W;Liu H;Wang S;Chen S;Yang Z
本文提出了一种新型的t形栅极Si/SiGe异质结隧道场效应晶体管（HTG-TFET），并通过Silvaco-Atlas仿真对其进行了研究。HTG-TFET的两个源区放置在栅极两侧，以增加隧穿面积。t形栅极在横向和纵向上与N+口袋重叠，增加了隧道结顶部的电场和隧道速率。此外，在袋状区域使用SiGe可以减小隧道的掘进距离。因此，HTG-TFET可以获得更高的导通电流。仿真结果表明，与硅基晶体管相比，HTG-TFET的导通电流提高了一个数量级。当vgis在0.1 ~ 0.4 V范围内变化时，HTG-TFET的平均亚阈值摆幅（SS）为44.64 mV/dec，当vgis = 0.2 V时，点SS为36.59 mV/dec。此外，本设计不能为ttfet电路设计带来良好的米勒电容。利用t形栅极和SiGe口袋区，优化了晶体管的整体性能。
In this paper, a new Si/SiGe heterojunction tunneling field-effect transistor with a T-shaped gate (HTG-TFET) is proposed and investigated by Silvaco-Atlas simulation. The two source regions of the HTG-TFET are placed on both sides of the gate to increase the tunneling area. The T-shaped gate is designed to overlap with N+pockets in both the lateral and vertical directions, which increases the electric field and tunneling rate at the top of tunneling junctions. Moreover, using SiGe in the pocket regions leads to the smaller tunneling distance. Therefore, the proposed HTG-TFET can obtain the higher on-state current. The simulation results show that on-state current of HTG-TFET is increased by one order of magnitude compared with that of the silicon-based counterparts. The average subthreshold swing (SS) of HTG-TFET is 44.64 mV/dec whenVgis varied from 0.1 to 0.4 V, and the point SS is 36.59 mV/dec atVg= 0.2 V. Besides, this design cannot bring the sever Miller capacitance for the TFET circuit design. By using the T-shaped gate and SiGe pocket regions, the overall performance of the TFET is optimized.