Stochastic chase decoder for reed-solomon codes

Stochastic chase decoder for reed-solomon codes
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里德所罗门码的随机追逐解码器

DOI:
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发表时间:
2012
期刊:
IEEE International New Circuits and Systems Conference
影响因子:
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通讯作者:
W. Gross
W. Gross
中科院分区:
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文献类型:
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作者:
Romain Heloir;Camille Leroux;S. Hemati;M. Arzel;W. Gross

文献摘要

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提出了一种基于随机Chase算法的软判决RS译码器的硬件实现方案。该解码器对于公知的RS(255,239)码在FER=10-4时实现了至少0.45dB的编码增益。据我们所知,这是软判决RS(255,239)解码器的硬件实现的最高报告编码增益。解码器在Virtex-5 FPGA上实现,工作速率为800 Mb/s。建议的解码器具有灵活的架构,非常适合于需要不同的吞吐量和解码性能的应用。
This paper presents a hardware implementation of a soft-decision Reed-Solomon (RS) decoder, based on the stochastic Chase algorithm. This decoder achieves a coding gain of at least 0.45 dB at FER=10-4 for the well-known RS(255,239) code. To the best of our knowledge this is the highest reported coding gain for a hardware implementation of soft-decision RS(255,239) decoder. The decoder is implemented on a Virtex-5 FPGA and works at 800 Mb/s. The proposed decoder has a flexible architecture and is well suited for applications requiring different throughputs and decoding performance.