On the Power of Fault Sensitivity Analysis and Collision Side-Channel Attacks in a Combined Setting

On the Power of Fault Sensitivity Analysis and Collision Side-Channel Attacks in a Combined Setting
复制标题

DOI:
10.1007/978-3-642-23951-9_20
复制
发表时间:
2011-09
期刊:
Water science and technology : a journal of the International Association on Water Pollution Research
影响因子:
--
通讯作者:
A. Moradi;Oliver Mischke;C. Paar;Yang Li;K. Ohta;K. Sakiyama
A. Moradi;Oliver Mischke;C. Paar;Yang Li;K. Ohta;K. Sakiyama
中科院分区:
其他
文献类型:
--
作者:
A. Moradi;Oliver Mischke;C. Paar;Yang Li;K. Ohta;K. Sakiyama

文献摘要

被引文献

相似文献

在CHES 2010上,提出了两种强大的新攻击,即故障敏感性分析和相关碰撞攻击。本文展示了如何将这些想法结合起来,创造更强大的攻击。提出了两种解决方案;两者都通过故障敏感性分析方法提取泄漏信息,而每一个都应用稍微不同的碰撞攻击来推断秘密信息,而不需要任何假设的泄漏模型。具有类似的故障注入方法,一种攻击利用错误密文字节的非均匀分布,而另一种攻击利用目标组合电路的数据相关定时特性。给出了在不同工艺条件下攻击佐世保LSI芯片的几个AES ASIC核的结果。使用门级对策或逻辑样式成功破坏受DPA攻击保护的内核表明了攻击的强度。
At CHES 2010 two powerful new attacks were presented, namely the Fault Sensitivity Analysis and the Correlation Collision Attack. This paper shows how these ideas can be combined to create even stronger attacks. Two solutions are presented; both extract leakage information by the fault sensitivity analysis method while each one applies a slightly different collision attack to deduce the secret information without the need of any hypothetical leakage model. Having a similar fault injection method, one attack utilizes the non-uniform distribution of faulty ciphertext bytes while the other one exploits the data-dependent timing characteristics of the target combination circuit. The results when attacking several AES ASIC cores of the SASEBO LSI chips in different process technologies are presented. Successfully breaking the cores protected against DPA attacks using either gate-level countermeasures or logic styles indicates the strength of the attacks.