Compact Reconfigurable Binary-Decision-Diagram Logic Circuit on a GaAs Nanowire Network
Compact Reconfigurable Binary-Decision-Diagram Logic Circuit on a GaAs Nanowire Network
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DOI：
10.1143/apex.3.025002
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发表时间：
2010-01
影响因子：
2.3
通讯作者：
Y. Shiratori;Kensuke Miura;R. Jia;N. Wu;S. Kasai
中科院分区：
文献类型：
--
作者：
Y. Shiratori;Kensuke Miura;R. Jia;N. Wu;S. Kasai
描述了一种基于香农布尔逻辑函数展开的可重构二元判决图逻辑电路及其在半导体纳米线网络上的图形表示。通过使用可编程开关来重新配置电路，这些开关可以电连接和断开少量分支。与传统的查找表结构相比，该电路具有结构紧凑、器件数量少的特点。在具有肖特基包裹门和基于SIN的可编程开关的六角形拓扑结构的GaAs纳米线网络上制作了一种可变布尔逻辑电路，并演示了其正确的逻辑操作和动态重构。
We describe a reconfigurable binary-decision-diagram logic circuit based on Shannon's expansion of Boolean logic function and its graphical representation on a semiconductor nanowire network. The circuit is reconfigured by using programmable switches that electrically connect and disconnect a small number of branches. This circuit has a compact structure with a small number of devices compared with the conventional look-up table architecture. A variable Boolean logic circuit was fabricated on an etched GaAs nanowire network having hexagonal topology with Schottky wrap gates and SiN-based programmable switches, and its correct logic operation together with dynamic reconfiguration was demonstrated.