Hardware-based image processing library for Virtex FPGA
Hardware-based image processing library for Virtex FPGA
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DOI：
10.1117/12.402510
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发表时间：
2000-10
期刊：
影响因子：
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通讯作者：
M. Gorgon;R. Tadeusiewicz
中科院分区：
文献类型：
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作者：
M. Gorgon;R. Tadeusiewicz
本文考虑了基于硬件的图像处理算法实现。对单个FPGA设备的使用 - ViRTEX作为能够实时进行图像处理的处理元件。为了实现硬件资源专业IP内核中的算法，已经设计和测试了。图像处理库由能够在软件级别链接在一起并在高容量FPGA设备中实现的单个内核组成。
The paper considers hardware-based realization of image processing algorithms. Usage of single FPGA device - Virtex as a processing element capable to carry out image processing in real-time is thoroughly discussed. For implementation of the algorithms in hardware resources specialized IP cores architectures has been designed and tested. The image-processing library consists of individual cores able to be linked together on a software level and implemented in high capacity FPGA devices is proposed.