Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates
Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates
复制标题
使用多态 NAND/NOR 门的多态电路综合方法
DOI：
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发表时间：
2015
期刊：
影响因子：
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通讯作者：
Václav Simek
中科院分区：
文献类型：
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作者：
Adam Crha;R. Ruzicka;Václav Simek
本文提出了一种处理多功能（多态）逻辑电路合成问题的新方法。多态概念背后的关键概念在于这种电路能够执行多个逻辑功能，而底层结构保持其排列不变。概述的行为是通过在电路设计阶段利用特殊的多功能组件（门）来建立的，其中它们之间的单个连接保持不变（不发生重新配置）。电路在给定时刻有意执行的确切功能是由实际工作环境（例如电源电压、温度或特殊信号）决定的。所提出的综合方法是基于相应函数的形式布尔表示。它的主要优势可以通过使用最小化技术的严格严格和算法符号来识别，这与主要基于启发式方法的竞争解决方案形成直接对比。
In this paper, a novel approach dealing with the issues of multifunctional (polymorphic) logic circuits synthesis is presented. Crucial notion behind the polymorphic concept resides in the fact that such kind of circuit is able to perform more than one logic function, while the underlying structure keeps its arrangement untouched. The outlined behaviour is established by means of utilizing special multifunctional components (gates) during circuit design phase, where the individual connections among them remains unchanged (no reconfiguration takes place). The exact function, which the circuit is purposely executing at a given moment, is determined by the actual operating environment (e.g. supply voltage, temperature or a special signal). The proposed synthesis method is based on a formal Boolean representation of corresponding functions. Its main advantage can be recognized in strictly rigid and algorithmic notation with the employment of minimization techniques, which is in a direct contrast to competitive solutions, predominantly based on heuristic approaches.