A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems

A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems
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DOI:
10.1109/mcas.2013.2256271
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发表时间:
2013-05
影响因子:
6.9
通讯作者:
T. Serrano-Gotarredona;T. Prodromakis;B. Linares-Barranco
T. Serrano-Gotarredona;T. Prodromakis;B. Linares-Barranco
中科院分区:
工程技术2区
文献类型:
--
作者:
T. Serrano-Gotarredona;T. Prodromakis;B. Linares-Barranco

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纳米技术的最新研究已经导致了纳米级器件的实际实现,这些器件表现为忆阻器,这是Chua基于电路理论推理在70年代假设的器件。另一方面,神经形态工程,一个基于神经科学知识实现物理工件的学科,将神经学习机制与忆阻器的操作相关联。因此,可以提出神经启发的学习架构,其利用纳米级忆阻器来构建具有非常密集的突触状存储器元件的非常大规模的系统。目前,对忆阻器工作的内在机制的深入理解仍然是一个悬而未决的问题,并且实际实现非常大规模和可靠的?忆阻织物用于神经学习应用还不是现实。然而,与此同时,研究人员正在提出并分析潜在的电路架构,该架构将标准CMOS衬底与顶部的忆阻纳米级织物相结合,以实现混合忆阻器-CMOS神经学习系统。本文的重点是一个这样的架构,用于实现非常完善的尖峰定时依赖可塑性(STDP)的学习机制,发现在生物学。在本文中,我们快速回顾尖峰神经系统,STDP学习,和忆阻器,并提出了一种混合忆阻器-CMOS系统架构,实现大规模STDP学习尖峰神经系统的潜力。这种架构最终将允许在一个印刷电路板(PCB)上实现实时的类脑处理学习系统,其中包括神经元和突触。
Recent research in nanotechnology has led to the practical realization of nanoscale devices that behave as memristors, a device that was postulated in the seventies by Chua based on circuit theoretical reasonings. On the other hand, neuromorphic engineering, a discipline that implements physical artifacts based on neuroscience knowledge, has related neural learning mechanisms to the operation of memristors. As a result, neuro-inspired learning architectures can be proposed that exploit nanoscale memristors for building very large scale systems with very dense synaptic-like memory elements. At present, the deep understanding of the internal mechanisms governing memristor operation is still an open issue, and the practical realization of very large scale and reliable ?memristive fabric? for neural learning applications is not a reality yet. However, in the meantime, researchers are proposing and analyzing potential circuit architectures that would combine a standard CMOS substrate with a memristive nanoscale fabric on top to realize hybrid memristor-CMOS neural learning systems. The focus of this paper is on one such architecture for implementing the very well established Spike-Timing-Dependent-Plasticity (STDP) learning mechanism found in biology. In this paper we quickly review spiking neural systems, STDP learning, and memristors, and propose a hybrid memristor-CMOS system architecture with the potential of implementing a large scale STDP learning spiking neural system. Such architecture would eventually allow to implement real-time brain-like processing learning systems with about neurons and synapses on one single Printed Circuit Board (PCB).