A 25–35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE
A 25–35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE
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DOI：
10.1109/tcsi.2018.2860019
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发表时间：
2019-02
期刊：
影响因子：
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通讯作者：
Sheikh Nijam Ali;Pawan Agarwal;S. Gopal;S. Mirabbasi;D. Heo
中科院分区：
文献类型：
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作者：
Sheikh Nijam Ali;Pawan Agarwal;S. Gopal;S. Mirabbasi;D. Heo
提出了一种用于毫米波（mmW）5G移动的通信的高效率中和连续F类（CCF）CMOS功率放大器（PA）设计技术。提出了一种具有高阶谐波谐振网络的寄生感知调谐负载，用于对CCF PA的电流和电压波形进行整形。在毫米波频率下，栅极-漏极电容（$C_{\mathrm {gd}}$）会在谐波调谐输出负载网络上产生不利的容性负载。结果，CCF PA遭受折衷的功率效率。为了解决这个问题，我们集成了一个Transformer，在功率器件的栅极-漏极之间具有可调耦合系数。该技术允许精确的C_{gd}}$中和，减少谐波调谐负载上的有害负载效应，同时提高功率效率和稳定性。我们采用65 nm CMOS工艺制造了一个CCF PA，在33.3%的分数带宽（25-35 GHz）上实现了>40%的功率附加效率（PAE），在29 GHz时实现了46.4%的峰值PAE。在30 GHz时，测得的峰值饱和输出功率为14.8 dBm。在1.5Gb/s的数据速率下，使用64正交幅度调制信号对PA进行测试。在此测试设置下，PA在28、32和34 GHz时分别实现了26%/24%/21.4%的调制PAE和9.2/8.8/8.6 dBm的平均输出功率（$P_{o，\mathrm {avg}}$），同时保持优于−25 dB的误差矢量幅度和−27 dBc的邻道泄漏比。据作者所知，该设计是mmW CMOS PA中报告的PAE最高的设计之一。
This paper presents a high-efficiency neutralized continuous class-F (CCF) CMOS power amplifier (PA) design technique for millimeter-wave (mmW) 5G mobile communications. A parasitic-aware tuned-load with a high-order harmonic-resonance network is proposed to shape the current and voltage waveforms for the CCF PA. At mmW frequencies, the gate-drain capacitance ( $C_{\mathrm {gd}}$ ) creates adverse capacitive loading on harmonic-tuned output load networks. As a result, a CCF PA suffers from compromised power efficiency. To address this, we integrate a transformer with a tunable coupling coefficient between gate-drain of the power-device. This proposed technique allows accurate neutralization of $C_{\mathrm {gd}}$ , reducing detrimental loading effect on harmonic-tuned load while enhancing power efficiency and stability. We fabricated a CCF PA in 65-nm CMOS technology achieving >40% power-added efficiency (PAE) over 33.3% fractional bandwidth (25–35 GHz) and 46.4% peak PAE at 29 GHz. The measured peak saturated output power ( $P_{o,\mathrm {sat}}$ ) is 14.8 dBm at 30 GHz. The PA is tested with 64-quadrature-amplitude-modulated signal at a data rate of 1.5 Gb/s. Under this test setup, the PA achieves modulated PAE of 26%/24%/21.4% and average output power ( $P_{o,\mathrm {avg}}$ ) of 9.2/8.8/8.6 dBm at 28, 32, and 34 GHz, respectively, while maintaining better than −25 dB of error vector magnitude and −27 dBc of adjacent channel leakage ratio. To the authors’ knowledge, this design presents one of the highest reported PAEs among mmW CMOS PAs.