Fault Tolerance in OpenSPARC Multicore Architecture Using Core Virtualization
Fault Tolerance in OpenSPARC Multicore Architecture Using Core Virtualization
复制标题
使用核心虚拟化的 OpenSPARC 多核架构中的容错
DOI：
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发表时间：
2008
期刊：
影响因子：
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通讯作者：
R. Parthasarathi
中科院分区：
文献类型：
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作者：
K. Chandrasekar;Revathi Ananthachari;S. Seshadri;R. Parthasarathi
在多核架构中，容错问题将随着核数量的增加而增加。大小缩放被认为是性能显著提高的来源。由于功率密度和片上温度的增加，这种缩放导致了对安装可靠性的担忧。困扰半导体器件的大多数磨损机制高度依赖于这些参数。处理器件故障的传统技术依赖于结构的粗粒度复制，忽略了CMP架构中固有的冗余。本文提出了一种有效利用OpenSSL多核处理器8核功能单元冗余的方法，通过核虚拟化来克服故障。在这里，我们专门在功能单元级别使用虚拟化，而不是核心级别的虚拟化。此外，可以扩展一些核内执行资源以提供功能上等同的结果。关键词-CMP，OpenSSL处理器，核心虚拟化，仿真Kavitha Risrasekar，Revathi Ananthachari，Sangeetha Seshadri，Ranjani Parthasarathi
In multicore architecture, fault tolerance issues will increase with increase in number of cores. Size scaling has been considered the source of dramatic performance gains. This scaling has lead to mounting reliability concerns due to increasing power densities and onchip temperatures. Most wear-out mechanisms that plague semiconductor devices are highly dependent on these parameters. Traditional techniques for dealing with device failures have relied on the coarse-grained replication of structures, ignoring the inherent redundancy in CMP architectures. Here we propose to make effective use of the redundancy of functional units in the 8 cores in OpenSPARC multicore processor to overcome faults by core virtualization. Here we specifically make use of virtualization at functional unit-level instead of core-level virtualization. In addition, some intra core execution resources may be extended to provide functionally equivalent results. Keywords-CMP, OpenSPARC processor,Core Virtualization, Emulation Kavitha Chandrasekar, Revathi Ananthachari, Sangeetha Seshadri, Ranjani Parthasarathi