An All-Digital High-Precision Built-In Delay Time Measurement Circuit
An All-Digital High-Precision Built-In Delay Time Measurement Circuit
复制标题
全数字高精度内置延迟时间测量电路
DOI：
10.1109/vts.2008.25
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发表时间：
2008
期刊：
影响因子：
--
通讯作者：
Chiou
中科院分区：
文献类型：
--
作者：
Ming Tsai;Ching;Chiou
Delay testing has become a major issue for manufacturing advanced systems on a chip. Automatic test equipment and scan techniques are usually applied in delay testing. However, the circuits under test have many circuit paths and dependent input patterns; it is hard to measure delay times accurately, especially when debugging small delay defects. We propose a built-in delay measurement (BIDM) circuit that is modified from Vernier delay lines. All digitally designed BIDMs with small area overhead can be easily embedded within testing circuits. BIDMs can be used to record the data propagation delay times within circuit path segments, for delay testing, diagnosis, and calibration requirements internal to the chip. Our BIDM was implemented in a 32bit error correction circuit by a chip using TSMC 0.18u technology. The instruments measured results showing that the BIDM chip correctly reported the CUT segment path delay times. The chip measurement results were a 95.83% match to the postlayout SPICE simulation values. This BIDM makes it possible to debug small delay defects in chips.
