Neural networks for high-storage content-addressable memory: VLSI circuit and learning algorithm
Neural networks for high-storage content-addressable memory: VLSI circuit and learning algorithm
复制标题
高存储内容寻址存储器的神经网络：VLSI电路和学习算法
DOI：
10.1109/4.32008
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发表时间：
1989
影响因子：
5.4
通讯作者：
P. Jespers
中科院分区：
文献类型：
--
作者：
M. Verleysen;B. Sirletti;A. Vandemeulebroecke;P. Jespers
描述了一个VLSI全互连神经网络的实现，每个突触只有两个二进制存储点。单个突触细胞的小面积允许实现由数百个神经元组成的神经网络。像Hebb规则这样的经典学习算法显示出较差的存储容量，特别是在VLSI神经网络中，其中突触权重的范围受到每个连接中包含的记忆点数量的限制；提出了一种将Hopfield神经网络编程为高容量内容可寻址存储器的算法。该算法获得的存储容量在模式识别应用中是非常有前途的。>
An implementation of a VLSI fully interconnected neural network with only two binary memory points per synapse is described. The small area of single synaptic cells allows implementation of neural networks with hundreds of neurons. Classical learning algorithms like the Hebb's rule show a poor storage capacity, especially in VLSI neural networks where the range of the synapse weights is limited by the number of memory points contained in each connection; an algorithm for programming a Hopfield neural network as a high-storage content-addressable memory is proposed. The storage capacity obtained with this algorithm is very promising for pattern-recognition applications. >