A new quaternary FPGA based on a voltage-mode multi-valued circuit

A new quaternary FPGA based on a voltage-mode multi-valued circuit
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一种基于电压模式多值电路的新型四进制FPGA

DOI:
10.1109/date.2010.5457105
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发表时间:
2010
期刊:
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)
影响因子:
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通讯作者:
L. Carro
L. Carro
中科院分区:
--
文献类型:
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作者:
C. Lazzari;Paulo F. Flores;J. Monteiro;L. Carro

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与 ASIC 设计相比,FPGA 结构因其上市时间早且一次性工程成本低而得到广泛应用。互连在现代 FPGA 中发挥着至关重要的作用,因为它们在延迟、功耗和面积方面起着主导作用。多值逻辑可以减少电路中的信号数量,因此可以作为有效减少互连影响的手段。在这项工作中,我们提出了一种基于低功耗四进制电压模式器件的新 FPGA 结构。所提出的架构最重要的特点是扇出减少、电线和开关数量少以及电线长度短。我们使用一组 FIR 滤波器来演示 FPGA 中四进制表示的优势。结果表明,功耗显着降低,且时间损失较小。
FPGA structures are widely used due to early time-to-market and reduced non-recurring engineering costs in comparison to ASIC designs. Interconnections play a crucial role in modern FPGAs, because they dominate delay, power and area. Multiple-valued logic allows the reduction of the number of signals in the circuit, hence can serve as a mean to effectively curtail the impact of interconnections. In this work we propose a new FPGA structure based on a low-power quaternary voltage-mode device. The most important characteristics of the proposed architecture are the reduced fanout, low number of wires and switches, and the small wire length. We use a set of FIR filters as a demonstrator of the benefits of the quaternary representation in FPGAs. Results show a significant reduction on power consumption with small timing penalties.