High transconductance and current density in field effect transistors using arrays of bundled semiconducting carbon nanotubes

High transconductance and current density in field effect transistors using arrays of bundled semiconducting carbon nanotubes
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DOI:
10.1063/5.0093859
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发表时间:
2022-08
影响因子:
4
通讯作者:
Sean M. Foradori;Jonathan H. Dwyer;Anjali Suresh;P. Gopalan;M. Arnold
Sean M. Foradori;Jonathan H. Dwyer;Anjali Suresh;P. Gopalan;M. Arnold
中科院分区:
物理与天体物理2区
文献类型:
--
作者:
Sean M. Foradori;Jonathan H. Dwyer;Anjali Suresh;P. Gopalan;M. Arnold

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我们研究了半导体碳纳米管(CNT)的捆绑是否可以增加由对齐的聚合物包裹的CNT阵列制成的场效应晶体管(FET)的导通和通态电流密度。通过切向流界面自组装产生堆积密度范围为20至50束μm−1的阵列,并测量具有(i)强离子凝胶栅极或(ii)弱15 nm SiO2背栅极的FET的导通和饱和导通电流密度与集束程度的关系。随着中间束高度从2 nm增加到4 nm,导通态和导通态电流都显著增加,但仅当使用强耦合离子凝胶门时。在−0.6 V漏极电压下测试,此类器件的导通电流高达50 μS/束和2 mS μm−1,通态电流高达1.7 mA μm−1。在低漏极电压下,关断电流也随着成束而增加,但如果阵列中最大(第95百分位数)束的尺寸限制在105 nm,则105 nm的开/关比仍然是可能的。具有强的环绕式电介质栅极的射频器件可以受益于通过使用与阵列中的个体化CNT相反的适度捆绑而增加的器件性能。
We examine if the bundling of semiconducting carbon nanotubes (CNTs) can increase the transconductance and on-state current density of field effect transistors (FETs) made from arrays of aligned, polymer-wrapped CNTs. Arrays with packing density ranging from 20 to 50 bundles μm−1 are created via tangential flow interfacial self-assembly, and the transconductance and saturated on-state current density of FETs with either (i) strong ionic gel gates or (ii) weak 15 nm SiO2 back gates are measured vs the degree of bundling. Both transconductance and on-state current significantly increase as median bundle height increases from 2 to 4 nm, but only when the strongly coupled ionic gel gate is used. Such devices tested at −0.6 V drain voltage achieve transconductance as high as 50 μS per bundle and 2 mS μm−1 and on-state current as high as 1.7 mA μm−1. At low drain voltages, the off-current also increases with bundling, but on/off ratios of ∼105 are still possible if the largest (95th percentile) bundles in an array are limited to ∼5 nm in size. Radio frequency devices with strong, wraparound dielectric gates may benefit from increased device performance by using moderately bundled as opposed to individualized CNTs in arrays.