System-level simulation and implementation for a high Q capacitive accelerometer with PD feedback compensation

System-level simulation and implementation for a high Q capacitive accelerometer with PD feedback compensation
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带 PD 反馈补偿的高 Q 值电容式​​加速度计的系统级仿真和实现

DOI:
10.1007/s00542-014-2315-4
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发表时间:
2015-10-01
影响因子:
2.1
通讯作者:
Che, Lufeng
Che, Lufeng
中科院分区:
工程技术4区
文献类型:
--
作者:
Song, Zhaohui;Sun, Teng;Che, Lufeng

文献摘要

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针对高Q值电容式加速度计的挑战,对一种全硅夹心式加速度计的结构和动态响应进行了分析。为了提高传感器的稳定性和增加闭环阻尼,设计了一种基于比例微分反馈补偿的模拟闭环接口电路,并利用SIMULINK/SIMSCAPE进行了仿真。在此基础上,制作了印刷电路板级电路和专用集成电路(ASIC)电路进行测试。仿真和测量提供了支持的设计。测试结果表明,该电路有效地提高了系统的动态响应时间。该加速度计的标度因子为0.9976 V/g,在±1 g范围内的二阶非线性系数为−400 ppm g/g2,平均本底噪声为2 μg/kHz(0-200 Hz)。
Based on the challenge of high-Q capacitive accelerometer, the analysis of the structure and the dynamic response of an all-silicon sandwich accelerometer are conducted. An analog closed-loop interface circuit based on proportional-differential feedback compensation is designed and simulated by SIMULINK/SIMSCAPE in order to stabilize the sensor and increase the closed-loop damping. Based on the design, a printed circuit board level circuit and an ASIC circuit are made for the test. Simulation and measurement are provided to support the design. Measurement results show that the circuit effectively improves the dynamic response time of the system. The accelerometer with ASIC circuit has the scale factor of 0.9976 V/g and the second order non-linearity of −400 ppm g/g2in the range of ±1 g, the average noise floor is 2 μg/√Hz (0–200 Hz).