A Case Against Hardware Managed DRAM Caches for NVRAM Based Systems
A Case Against Hardware Managed DRAM Caches for NVRAM Based Systems
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DOI：
10.1109/ispass51385.2021.00036
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发表时间：
2021-03
期刊：
影响因子：
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通讯作者：
Mark Hildebrand;Julian T. Angeles;Jason Lowe-Power;V. Akella
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文献类型：
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作者：
Mark Hildebrand;Julian T. Angeles;Jason Lowe-Power;V. Akella
基于相变存储器（如Optane DC永久存储器模块）的非易失性存储器（NVRAM）正在进入英特尔服务器，以满足具有巨大内存占用的新兴应用的需求。这些系统在相同的存储器通道上具有DRAM和NVRAM两者，其中较小容量的DRAM在所谓的2LM模式中用作较大容量的NVRAM的高速缓存。在这项工作中，我们使用广泛的合成和现实世界的基准等DRAM缓存的性能分析真实的硬件。我们确定了DRAM缓存在这些新兴的系统，防止大规模的，带宽限制的应用程序充分利用NVRAM的读取和写入带宽的三个关键限制。我们表明，基于软件的技术是必要的编排DRAM和PMM之间的数据移动，这样的工作负载，以充分利用这些新的异构存储器系统。
Non-volatile memory (NVRAM) based on phase-change memory (such as Optane DC Persistent Memory Module) is making its way into Intel servers to address the needs of emerging applications that have a huge memory footprint. These systems have both DRAM and NVRAM on the same memory channel with the smaller capacity DRAM serving as a cache to the larger capacity NVRAM in the so called 2LM mode. In this work we analyze the performance of such DRAM caches on real hardware using a broad range of synthetic and real-world benchmarks. We identify three key limitations of DRAM caches in these emerging systems which prevent large-scale, bandwidth bound applications from taking full advantage of NVRAM read and write bandwidth. We show that software based techniques are necessary for orchestrating the data movement between DRAM and PMM for such workloads to take full advantage of these new heterogeneous memory systems.