Functional block identification in circuit design recovery

Functional block identification in circuit design recovery
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电路设计恢复中的功能块识别

DOI：
10.1109/hst.2016.7495560
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发表时间：
2016
期刊：
2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
影响因子：
--
通讯作者：
Bradley Barrett
Bradley Barrett
中科院分区：
--
文献类型：
--
作者：
Jacob Couch;Elizabeth Reilly;Morgan Schuyler;Bradley Barrett

文献摘要

被引文献

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设计恢复通常跨许多不同的平台进行，以获取有关系统的底层内部结构的知识。本文引入了分段和模糊匹配的概念来识别设计中的IP块。通过此过程，可以在网表中识别已知IP块，特别是在优化的ASIC和FPGA设计中。此外，与传统的子图同构问题相比，这些算法具有更高的计算效率。
Design recovery is commonly conducted across many different platforms to gain knowledge about the underlying internals of a system. In this paper, a concept of segmentation and fuzzy matching is introduced to identify IP blocks within a design. Through this process, known IP blocks, especially in optimized ASIC and FPGA designs, can be identified within a netlist. Furthermore, these algorithms are computationally more efficient in comparison to the traditional subgraph isomorphism problem.