High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic Electro-Optic Circuits and Architectures
High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic Electro-Optic Circuits and Architectures
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DOI：
10.1145/3583781.3590258
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发表时间：
2023-04
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通讯作者：
Ishan G. Thakkar;Sairam Sri Vatsavai;Venkata Sai Praneeth Karempudi
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作者：
Ishan G. Thakkar;Sairam Sri Vatsavai;Venkata Sai Praneeth Karempudi
本文提出了基于微环谐振器(MRR)的多态电光电路和结构，可用于高速、高能效的非二进制可重构计算。我们的多态E-O电路可以动态编程，以在不同时间执行不同的逻辑和算术功能。它们可以提供紧凑性和多态，从而改进操作数处理，减少空闲时间，并增加面积和静态功率开销的摊销。当与具有在现场积累大量光脉冲的固有能力的灵活光电探测器相结合时，我们的电路可以支持非二进制格式的节能数据处理，例如随机/一元和高维存储格式。此外，我们的多态电光电路支持可配置的电光计算加速器架构，用于处理二进制化和整数量化卷积神经网络(CNN)。在面积、延迟和能耗方面，我们将我们设计的多态电光电路和结构与以前工作中的几种电路和结构进行了比较。
In this paper, we present microring resonator (MRR) based polymorphic E-O circuits and architectures that can be employed for high-speed and energy-efficient non-binary reconfigurable computing. Our polymorphic E-O circuits can be dynamically programmed to implement different logic and arithmetic functions at different times. They can provide compactness and polymorphism to consequently improve operand handling, reduce idle time, and increase amortization of area and static power overheads. When combined with flexible photodetectors with the innate ability to accumulate a high number of optical pulses in situ, our circuits can support energy-efficient processing of data in non-binary formats such as stochastic/unary and high-dimensional reservoir formats. Furthermore, our polymorphic E-O circuits enable configurable E-O computing accelerator architectures for processing binarized and integer quantized convolutional neural networks (CNNs). We compare our designed polymorphic E-O circuits and architectures to several circuits and architectures from prior works in terms of area, latency, and energy consumption.