RISC approach to design of fuzzy processor architecture
RISC approach to design of fuzzy processor architecture
复制标题
模糊处理器架构设计的 RISC 方法
DOI：
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发表时间：
1992
期刊：
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通讯作者：
Hiroyuki Watanabe
中科院分区：
文献类型：
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作者：
Hiroyuki Watanabe
尝试设计一个模糊信息处理器作为一个应用程序特定的处理器，使用定量的方法。这种方法是由精简指令集计算机（RISC）架构设计师开发的。提出的基本架构由作为核心处理器的RISC和用于模糊逻辑相关操作的特殊硬件功能单元组成。模糊相关的功能单元应该集成到一个核心或作为一个协处理器。特别是，以下两个问题被认为是：模糊信息处理的指令集和模糊理论运算的向量指令。<<ETX>>
An attempt is made to design a fuzzy information processor as an application-specific processor using a quantitative approach. The approach was developed by reduced instruction set computer (RISC) architecture designers. The basic architecture proposed consists of a RISC as a core processor with special hardware functional units for fuzzy-logic-related operations. Fuzzy-related functional units should be either integrated into a core or placed as a coprocessor. In particular, the following two issues are considered: an instruction set for fuzzy information processing; and vector instruction for fuzzy theoretic operations.<<ETX>>