System-on-Chip Platform Security Assurance: Architecture and Validation
System-on-Chip Platform Security Assurance: Architecture and Validation
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DOI：
10.1109/jproc.2017.2714641
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发表时间：
2018-01-01
影响因子：
20.6
通讯作者：
Bhunia, Swarup
中科院分区：
文献类型：
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作者：
Ray, Sandip;Peeters, Eric;Bhunia, Swarup
现代片上系统（SoC）设计包括各种高度敏感的资产，这些资产必须受到保护以防止未经授权的访问。SoC设计的一个重要方面涉及对针对此类资产的攻击的弹性机制的探索、分析和评估。这些攻击可能来自多个来源，包括硬件中的恶意知识产权块（IP）、恶意或恶意固件和软件、系统与其他设备的不安全通信，以及通过电源和性能配置文件的侧信道漏洞。针对这些攻击的对策同样多种多样，包括架构、设计、实现和基于验证的保护。在本文中，我们提供了一个全面的概述，在现代SoC设计的安全基础设施，包括弹性技术和他们的验证范例在硅前和硅后阶段。我们确定当前弹性和分析架构中的差距，并提出设计和验证解决方案来解决这些问题。最后，我们提供了业界对当前SoC安全实践的作用和影响的看法，并讨论了这一重要领域的一些新兴趋势。
Modern system-on-chip (SoC) designs include a wide variety of highly sensitive assets which must be protected from unauthorized access. A significant aspect of SoC design involves exploration, analysis, and evaluation of resiliency mechanisms against attacks to such assets. These attacks may arise from a number of sources, including malicious intellectual property blocks (IPs) in the hardware, malicious or vulnerablefirmware and software, insecure communication of the system with other devices, and side-channel vulnerabilities through power and performance profiles. Countermeasures for these attacks are equally diverse, which include architecture, design, implementation, and validation-based protection. In this paper, we provide a comprehensive overview of the security infrastructure in modern SoC designs, including both resiliency techniques and their validation paradigms at presilicon and postsilicon stages. We identify gaps in current resiliency and analysis architectures and propose design and validation solutions to address them. Finally, we provide industry perspectives on the role and impact of current practices on SoC security, and discuss some emerging trends in this important area.