Cryogenic electronics for the read-out of quantum processors
Cryogenic electronics for the read-out of quantum processors
复制标题
用于量子处理器读出的低温电子器件
DOI：
10.4233/uuid:e833f394-c8b1-46e2-86b8-da0c71559538
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发表时间：
2019
期刊：
影响因子：
--
通讯作者：
H. Homulle
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文献类型：
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作者：
H. Homulle
与现在用经典计算机实现的计算相比，量子计算有望实现指数级的计算速度。通过这种方式，它能够评估更复杂的模型和对当前安全算法的破坏。对于量子系统的运行，还有许多问题有待回答。目前，有几种量子技术承诺既可靠又可扩展，这是大规模量子操作所需的两个特征。所有技术的共同之处是工作温度需要接近绝对零度，即低于100mK，以抑制环境噪声并允许量子属性变得“可见”。为了运行任何量子处理器，量子比特(Qubit)的读出和控制都需要一个所谓的量子经典接口。该接口由各种电子模块组成，如模数转换器、数模转换器、混音器、放大器和数字控制器。特别是，模拟块需要努力满足噪声和稳定性限制，因为不会干扰非常敏感的量子比特，并允许读取微小信号。由于量子比特生活在极深的低温下，长导线将低温与室温环境连接起来，大多数电子设备都位于室温环境中。然而，对于可扩展的系统，热注入成为一个严重的问题，在300K和亚开尔文之间有许多导线。此外，如此数量的互连要机械地放置在稀释冰箱中是具有挑战性的。因此，在这项工作中，我们建议不在室温下实现电子学，而是在更接近量子比特的温度下实现，例如在4K下。这不仅大大减少了室温和量子比特之间的布线，而且在这样的温度下我们也可以受益于较低的电子噪声。传统电子设备的工作温度比正常温度范围低近200°C，这并不是一件容易的事，因为设备特性发生了显著变化，大多数电路不再按预期工作。在集成电子世界的主要技术--cmos工艺中，实现任何电路所需的晶体管的行为在低温下会有相当大的偏差。晶体管的阈值电压上升，迁移率增加，亚阈值斜率变得更陡峭，这只是这些偏差中的几个。虽然在性能上有所改进，但也有一些相反的影响，需要对晶体管进行表征才能观察到这些变化。一旦器件在如此低的温度下被表征，就可以建立新的模型，并且可以模拟和调整电路以在低温下正常运行。幸运的是，已经有各种商业上可用的设备可以抵御寒冷。我们展示了各种商业可用的器件，例如采用28 nm CMOS工艺实现的现场可编程门阵列(FPGA)，在4~K下运行而不会产生太大影响。它的性能仅在5%到10%的范围内发生微小变化，所有被测试的电路实现在300~K下也工作在4K。我们将这两种商业可用器件与定制设计的CMOS电路相结合，实现了一个用于自旋量子位的低温读出平台。该系统由放大器、模数转换器、现场可编程门阵列、稳压电路和时钟发生器组成。它允许放大来自量子比特的微小信号，并直接在FPGA中数字化，以便在4~K的本地处理数据。该系统是在低温下操作部分量子经典接口的第一次系统尝试之一，并为未来组成完整的量子比特电子接口的系统在如此低的温度下操作奠定了基础。低温电子系统需要解决的主要问题之一是它们的功耗。在4K时，功率预算被简单地限制在大约1或2瓦，而在更深的低温下，功率预算以指数级更低，从而限制了大型电子系统的尺寸。我们的商业和定制电路相结合的方法将不得不被满足功率和可扩展性限制的单一(定制)技术稳步取代。最好的候选者之一是cmos，这是一项行业几十年来一直依赖的技术，得益于摩尔定律的许多优化。
Quantum computing promises an exponential speed-up of computation compared to what is nowadays achievable with classical computers. In this way, it enables the evaluation of more complex models and the breaching of current security algorithms. For the operation of a quantum system, many questions remain to be answered. Currently, there are several quantum technologies that promise to be both reliable and scalable, two features required for large scale quantum operations. Common to all technologies is the operating temperature that needs to be close to absolute zero, i.e. below 100 mK, to suppress environment noise and allow the quantum properties to become 'visible'. In order for any quantum processor to be operated, a so-called quantum-classical interface is required for the quantum bit (qubit) read-out and control. This interface consists of various electronic blocks, such as analog-to-digital converters, digital-to-analog converters, mixers, amplifiers and a digital controller. Especially the analog blocks require effort to meet the noise and stability constraints as not to disturb the very sensitive qubits and allow reading of the tiny signals. As the qubits live in extremely deep-cryogenic temperatures, long wires interface the cryogenic with the room temperature environment, where most of the electronics is situated. However, for a scalable system, heat injection becomes a serious problem, with many wires between 300 K and sub-Kelvin. Furthermore, such amount of interconnects is challenging to mechanically place in a dilution refrigerator. Therefore, in this work, we propose to implement the electronics not at room temperature, but at a temperature much closer to the qubits, for example at 4 K. This not only reduces significantly the wiring between room temperature and the qubits, but we can also benefit from lower electronic noise at such a temperature. The operation of conventional electronics almost 200°C below its normal temperature range is not trivial as device properties alter significantly and most circuits no longer operate as intended. In CMOS processes, the main technology in the integrated electronics world, the behaviour of the transistors, required for the implementation of any circuit, deviates considerably at low temperatures. The transistor's threshold voltage goes up, the mobility increases and the subthreshold slope becomes steeper, to name just a few of these deviations. Although there are improvements in performance, there are also some counter effects, and characterization of the transistors is needed to observe the changes. Once devices are characterized at such low temperatures, new models can be built and circuits can be simulated and adapted to operate properly at cryogenic temperatures. Luckily, there are various commercially available devices that can already withstand the chills of cold. We demonstrated various commercially available devices, such as a field-programmable gate array (FPGA) implemented in a 28 nm CMOS process, to be operating without major concerns at 4~K. Its properties alter only slightly, within 5 to 10%, and all tested circuit implementations, working at 300~K, also worked at 4 K. We combined both commercially available devices, that operate 200 K below their specified temperature range, with custom designed CMOS circuits to implement a cryogenic read-out platform for spin qubits. This system comprises amplifiers, an ADC, an FPGA, voltage regulators and a clock generator. It allows to amplify the tiny signal from the qubits and digitize it directly in the FPGA in order to process the data locally at 4~K. This system is one of the first systematic attempts at operating a part of the quantum-classical interface at cryogenic temperatures and forms the basis for future systems comprising the complete electronic interface for qubits to operate at such low temperatures. One of the main problems to tackle for cryogenic electronic systems is their power consumption. Power budgets are simply limited to roughly 1 or 2 Watts at 4 K and exponentially lower at deeper cryogenic temperatures, thus limiting the size of large-scale electronic systems. Our approach of combined commercial and custom circuits will have to be steadily replaced by a single (custom) technology that meets both power and scalability constraints. One of the best candidates is CMOS, a technology that the industry has relied upon for several decades and benefits from many optimizations thanks to Moore's law.