High-Level Synthesis for Multi-Cycle Transient Fault Tolerant Datapaths
High-Level Synthesis for Multi-Cycle Transient Fault Tolerant Datapaths
复制标题
多周期瞬态容错数据路径的高级综合
DOI：
10.1109/iolts.2011.5993804
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发表时间：
2011
期刊：
影响因子：
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通讯作者：
Hideyuki Ichihara
中科院分区：
文献类型：
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作者：
Tomoo Inoue;Hayato Henmi;Yuki Yoshikawa;Hideyuki Ichihara
随着半导体技术的进步，对粒子撞击引起的瞬态故障的容错性（称为SET (single event transient)）成为一个重要的问题，而且未来的技术带来了粒子撞击引起的跨电路多个周期的长时间错误发生的可能性。本文讨论了多周期暂态容错数据路径的高级综合问题。阐明了多周期暂态容错数据路径的多周期可纠错性和可检测性条件，提出了一种求kc-周期可纠错/ kd-周期可检错数据路径最小算子约束的启发式算法。该方法只关注瞬时故障（而不是永久性故障），因此可以推导出适当的设计，以满足SET的容错要求，避免使用过多的硬件资源。
As the advance in semiconductor technology, the tolerance for transient faults caused by particle strike, called SET (single event transient), becomes an important issue, and moreover future technologies bring the possibility of occurrence of long duration errors spanning across multiple cycles of the circuits due to particle strike. In this paper we discuss high-level synthesis for multi-cycle transient fault tolerant datapaths. Clarifying the conditions for multi-cycle error correctability and detectability of multi-cycle transient fault tolerant datapaths, we propose a heuristic algorithm for finding optimal operator binding of kc-cycle error correctable / kd-cycle error detectable datapaths with minimum operators. The method focuses on only transient faults (not permanent ones), and therefore it can derive appropriate designs necessary and sufficient for tolerance of SET avoiding use of excessive hardware resources.