Field dependence of interface-trap buildup in polysilicon and metal gate MOS devices
Field dependence of interface-trap buildup in polysilicon and metal gate MOS devices
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DOI：
10.1109/23.101171
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发表时间：
1990-12
影响因子：
1.8
通讯作者：
M. Shaneyfelt;J. Schwank;D. Fleetwood;P. Winokur;K. L. Hughes;F. Sexton
中科院分区：
文献类型：
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作者：
M. Shaneyfelt;J. Schwank;D. Fleetwood;P. Winokur;K. L. Hughes;F. Sexton
在-4.2 MV/cm到+4.7 MV/cm的电场范围内，研究了多晶硅和金属栅极MOS晶体管中辐射诱导的氧化电荷和界面阱电荷（δ V/sub - ot/和δ V/sub - ot/）的产生与电场的关系。如果考虑到电子-空穴复合效应，多晶硅和金属栅极晶体管的δ V/sub / /的绝对值和δ V/sub / /的饱和值在E/sub / />或=0.4 MV/cm时都显示出近似的E/sup -1/2/场依赖关系。对于负偏压辐照后的恒定正偏压退火，δ V/sub /的饱和值也存在E/sup -1/2/依赖性。观察到的E/sup -1/2/场依赖性表明，在这些器件中产生的界面陷阱总数可能由正偏压照射时Si/SiO/sub - 2/界面附近的空穴捕获或负偏压照射时栅极/SiO/sub - 2/界面附近的空穴捕获决定，尽管H/sup +/漂移仍然是该过程中可能的速率限制步骤。基于这些结果，提出了一个空穴捕获/氢输运模型——包括空穴捕获和随后的近界面H/sup +/释放、输运和界面反应——作为这些多晶硅和金属栅极晶体管中δ V/sub /积累的可能解释。>
The electric field dependence of radiation-induced oxide- and interface-trap charge ( Delta V/sub ot/ and Delta V/sub it/) generation for polysilicon- and metal-gate MOS transistors is investigated at electric fields (E/sub ox/) from -4.2 MV/cm to +4.7 MV/cm. If electron-hole recombination effects are taken into account, the absolute value of Delta V/sub ot/ and the saturated value of Delta V/sub it/ for both polysilicon- and metal-gate transistors are shown to follow an approximate E/sup -1/2/ field dependence for E/sub ox/>or=0.4 MV/cm. An E/sup -1/2/ dependence for the saturated value of Delta V/sub it/ was also observed for negative-bias irradiation followed by a constant positive-bias anneal. The E/sup -1/2/ field dependence observed suggests that the total number of interface traps created in these devices may be determined by hole trapping near the Si/SiO/sub 2/ interface for positive-bias irradiation or near the gate/SiO/sub 2/ interface for negative bias irradiation, though H/sup +/ drift remains the likely rate-limiting step in the process. Based on these results, a hole-trapping/hydrogen transport model-involving hole trapping and subsequent near-interfacial H/sup +/ release, transport, and reaction at the interface-is proposed as a possible explanation of Delta V/sub it/ buildup in these polysilicon- and metal-gate transistors. >