Parallelism in Deep Learning Accelerators
Parallelism in Deep Learning Accelerators
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DOI：
10.1109/asp-dac47756.2020.9045206
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发表时间：
2020-01
期刊：
影响因子：
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通讯作者：
Linghao Song;Fan Chen;Yiran Chen;H. Li
中科院分区：
文献类型：
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作者：
Linghao Song;Fan Chen;Yiran Chen;H. Li
深度学习是人工智能的核心，它在广泛的应用中实现了最先进的技术。深度学习处理中的计算和数据强度对传统计算平台提出了重大挑战。因此，提出了专门的加速器架构来加速深度学习。在本文中，我们将当前深度学习加速器的设计空间分为三个层次，（1）处理引擎、（2）内存和（3）加速器，并从三个层次的并行性角度提出了建设性的观点。
Deep learning is the core of artificial intelligence and it achieves state-of-the-art in a wide range of applications. The intensity of computation and data in deep learning processing poses significant challenges to the conventional computing platforms. Thus, specialized accelerator architectures are proposed for the acceleration of deep learning. In this paper, we classify the design space of current deep learning accelerators into three levels, (1) processing engine, (2) memory and (3) accelerator, and present a constructive view from a perspective of parallelism in the three levels.