Arithmetic-oriented multiple-valued logic-in-memory VLSI based on current-mode logic
Arithmetic-oriented multiple-valued logic-in-memory VLSI based on current-mode logic
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基于电流模式逻辑的面向算术的多值内存逻辑VLSI
DOI：
10.1109/ismvl.2000.848655
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发表时间：
2000
期刊：
影响因子：
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通讯作者：
M. Kameyama
中科院分区：
文献类型：
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作者：
S. Kaeriyama;T. Hanyu;M. Kameyama
为了实现紧凑的算法VLSI系统，提出了一种新的逻辑存储器结构，该结构利用浮栅MOS晶体管将存储元件分布在电流模逻辑电路平面上。由于不仅具有存储功能，而且还将电压模式线性求和和电压-电流转换合并到单个浮栅MOS晶体管中，因此内存逻辑VLSI变得非常紧凑且具有高性能。算例表明，在相同开关速度下，与相应的二进制CMOS实现相比，所提出的四值电流模式全加法器的有效芯片面积减少到5%。
A new logic-in-memory architecture, in which storage elements are distributed over a current-mode logic-circuit plane by the use of floating-gate MOS transistors, is proposed to realize a compact arithmetic VLSI system. Since not only a storage function but also a voltage-mode linear summation and a voltage-to-current conversion are merged into a single floating-gate MOS transistor, the logic-in-memory VLSI becomes very compact with a high-performance capability. As an example, it is demonstrated that the effective chip area of the proposed four-valued current-mode full adder is reduced to 5% under the same switching speed in comparison with the corresponding binary CMOS implementation.