Verilog-A based compact modeling of the magneto-electric FET device
Verilog-A based compact modeling of the magneto-electric FET device
复制标题
基于 Verilog-A 的磁电 FET 器件紧凑建模
DOI:
10.1109/e3s.2017.8246186
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发表时间:
2017
期刊:
影响因子:
--
通讯作者:
P. Dowben
中科院分区:
文献类型:
--
作者:
Nishtha Sharma;A. Marshall;Jonathan P. Bird;P. Dowben
The first spin transistor was proposed by Das and Datta in 1990 [1]. Since then, there has been a lot of active research on the spin based transistors in the academia and industry. The device structure resembles a CMOS transistor with the source and drain acting as a spin polarizer and spin detector respectively. The voltage applied across the gate controls the spin precession in the channel through electric field generated by spin orbit dependent Rashba effect. This results in magnitude change of the drain to source (IDS) current which represents the state variable of the device. Previously, Verilog-A based models have been proposed for the Rashba effect based SpinFET transistors [2-3]. Unfortunately, the Rashba effect is weak making it difficult for the realization of an effective room temperature Datta-Das transistor.