Internal Organization of the Alpha 21164, a 300-MHz 64-bit Quad-issue CMOS RISC Microprocessor
Internal Organization of the Alpha 21164, a 300-MHz 64-bit Quad-issue CMOS RISC Microprocessor
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Alpha 21164(一款 300 MHz 64 位四核 CMOS RISC 微处理器)的内部结构
DOI:
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发表时间:
1995
期刊:
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通讯作者:
G. Wolrich
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文献类型:
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作者:
J. Edmondson;P. Rubinfeld;P. Bannon;B. Benschneider;D. Bernstein;R. Castelino;E. Cooper;D. Dever;D. R. Donchin;T. Fischer;Anil K. Jain;S. Mehta;J. Meyer;R. Preston;V. Rajagopalan;C. Somanathan;Scott A. Taylor;G. Wolrich
A new CMOS microprocessor, the Alpha 21164, reaches 1,200 mips/600 MFLOPS (peak performance). This new implementation of the Alpha architecture achieves SPECint92/SPECfp92 performance of 345/505 (estimated). At these performance levels, the Alpha 21164 has delivered the highest performance of any commercially available microprocessor in the world as of January 1995. It contains a quad-issue, superscalar instruction unit; two 64-bit integer execution pipelines; two 64-bit floating-point execution pipelines; and a high-performance memory subsystem with multiprocessor-coherent write-back caches.