A wafer-level heterogeneous technology integration for flexible pseudo-SoC
A wafer-level heterogeneous technology integration for flexible pseudo-SoC
复制标题
灵活伪SoC的晶圆级异构技术集成
DOI：
10.1109/isscc.2010.5434011
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发表时间：
2010
期刊：
影响因子：
--
通讯作者：
H. Funaki
中科院分区：
文献类型：
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作者：
H. Yamada;Yutaka Onozuka;A. Iida;K. Itaya;H. Funaki
已报道的MEMS-LSI集成技术主要是利用MEMS和CMOS LSI之间工艺兼容性的优势，实现单片集成片上系统(SoC)[1]。然而，在MEMS和标准CMOS工艺不兼容的情况下，它们一直无法集成。此外，已经报道了许多应用系统级封装（SiP）技术和内插器基板来实现电子设备的MEMS-LSI集成技术。然而，使用SiP技术，由于内插器基板在SiP中占据较大面积，因此无法实现与单片集成SoC相当的高集成密度。因此，需要开发先进的 MEMS-LSI 集成技术来实现包含 MEMS 器件的高度集成 SoC [2]。
The MEMS-LSI integration technologies that have been reported are mainly implemented for monolithic integrated System on Chip (SoC) by applying the advantages of process compatibility between MEMS and CMOS LSI [1]. However, it has been impossible to integrate them in the case that MEMS and standard CMOS processes are incompatible. Furthermore, many MEMS-LSI integration technologies applying System in Package (SiP) technology with the interposer substrate to realize electronics devices have been reported. However, using SiP technology, it has not been possible to achieve high integration density comparable to that of monolithic integrated SoC because the interposer substrate occupies a large area in SiP. Accordingly, development of an advanced MEMS-LSI integration technology to realizing highly integrated SoC incorporating MEMS devices is required [2].