Complementary Organic Logic Gates on Plastic Formed by Self-Aligned Transistors with Gravure and Inkjet Printed Dielectric and Semiconductors
Complementary Organic Logic Gates on Plastic Formed by Self-Aligned Transistors with Gravure and Inkjet Printed Dielectric and Semiconductors
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DOI：
10.1002/aelm.201500272
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发表时间：
2016-02-01
影响因子：
6.2
通讯作者：
Campbell, Alasdair J.
中科院分区：
文献类型：
--
作者：
Higgins, Stuart G.;Muir, Beinn V. O.;Campbell, Alasdair J.
DOI：10.1002/aelm. 201500272逻辑门，[12]单极触发器和半加法器。[13虽然之前的报道已经结合了凹版印刷和喷墨印刷来制造p型有机场效应晶体管（OFFERT），[15]但缺乏对每种工艺对器件电性能影响的直接比较研究。在这里，我们探讨了半导体的凹版印刷与喷墨印刷、OFET电介质的凹版印刷与光刻图案化以及长沟道（> 1 µm）与短沟道（< 1 µm）OFET。凹版印刷可以实现非常大面积、快速的卷到卷制造，但受到制造陈词滥调（印刷版）的费用和时间成本的限制。[16喷墨印刷使计算机设计的电路能够容易地印刷，受到印刷的相对吞吐量和速度的限制。[2]然而，这两种技术的分辨率仍然局限于微米级和更大的挑战，可靠地将油墨转移到基板上而不扩散或去湿，同时仍然保持电气性能。虽然最近的方法正在改善这种限制，例如，Kang等人的工作在凹版印刷的亚5微米栅电极上，[18]或Sekitani等人的工作在2微米喷墨印刷电极上，[19]图案化亚微米电极几何形状的选择是有限的。我们先前已经证明了紫外纳米压印光刻（UV-NIL）是一种可行的方法，用于在塑料上图案化亚微米通道长度的OFFERS。[20]我们的方法还使用自对准光刻，以尽量减少栅源极和栅漏极之间的重叠，减少寄生重叠电容，降低开关速度的OFFETs。[21自对准产生其它益处，例如克服设备对准容差、减少泄漏电流，且与更复杂电路（例如自对准单极环形振荡器）兼容。[23]在这项工作中，我们使用了底栅底接触架构，以避免将半导体暴露于紫外线和用于自对准的加工化学品。除了自对准之外，我们还进一步扩展了制造方法，将凹版印刷的半导体和半导体以及喷墨印刷的半导体结合起来。我们展示了p型和n型器件的图案并排在同一基板上沿着与互补反相器和逻辑门。图1说明了本工作中使用的材料和架构。铝OFET栅极通过光刻（PL）或UV-NIL图案化。交叉印刷专有电介质（GSID 938109-1，BASF）[24，25]是PL图案化的或凹版印刷的。自对准金电极被图案化
DOI: 10.1002/aelm. 201500272 logic gates,[12] unipolar flip-flops and half-adders.[13, 14] Although previous reports have combined gravure and inkjet printing to fabricate p-type organic field-effect transistors (OFETs),[15] there is a lack of direct comparative studies of the impact of each process on the electrical performance of devices. Here, we explore gravure versus inkjet printing of semiconductors, gravure printing versus photolithographic patterning of the OFET dielectric, and long-channel (> 1 µm) versus short channel (< 1 µm) OFETs.Gravure printing enables very large-area, fast, roll-to-roll manufacturing, limited by the expense and time cost of fabricating clichés (printing plates).[16, 17] Inkjet printing enables a computer-designed circuit to be printed readily and easily, limited by the relative throughput and speed of printing.[2] However, the resolution of both technologies is still restricted to the micrometer scale and larger by the challenge of reliably transferring inks onto a substrate without spreading or dewetting, while still maintaining electrical performance. While recent approaches are improving upon this limit, for example, the work of Kang et al. on gravure printed sub-5 µm gate electrodes,[18] or that of Sekitani et al. on 2 µm inkjet printed electrodes,[19] the options for patterning sub-micrometer electrode geometries are limited. We have previously demonstrated how ultraviolet nanoimprint lithography (UV-NIL) is a viable method for patterning sub-micrometer channel length OFETs on plastic.[20] Our approach also uses self-aligned lithography to minimize the overlap between the gate–source and gate–drain electrodes, reducing parasitic overlap capacitances that reduce the switching speed of OFETs.[21, 22] Self-alignment yields other benefits such as overcoming equipment alignment tolerances, reducing leakage currents, and is compatible with more complex circuitry such as self-aligned unipolar ring oscillators.[23] In this work, we have used bottom-gate bottom-contact architectures, to avoid exposing the semiconductor to both the ultraviolet light and processing chemicals used for self-alignment. In addition to self-alignment, here we extend the fabrication approach further by incorporating gravure printed dielectrics and semiconductors, as well as inkjet printed semiconductors. We demonstrate both p-and n-type devices patterned side-by-side on the same substrate along with complementary inverters and logic gates. Figure 1 illustrates the materials and architectures used in this work. Aluminum OFET gates were patterned either photolithographically (PL) or via UV-NIL. A cross-linkable proprietary dielectric (GSID 938109-1, BASF)[24, 25] was either PL patterned or gravure printed. Self-aligned gold electrodes were patterned