Prediction of back-end process-induced wafer warpage and experimental verification
Prediction of back-end process-induced wafer warpage and experimental verification
复制标题
后端工艺引起的晶圆翘曲预测及实验验证
DOI：
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发表时间：
2002
期刊：
影响因子：
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通讯作者：
L. Ernst
中科院分区：
文献类型：
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作者：
R. van Silfhout;W. V. van Driel;Y. Li;G.Q. Zhang;L. Ernst
在晶圆制造的后端过程中，由于各种应用材料的热膨胀系数不匹配而发生晶圆翘曲。大的晶圆翘曲是导致工艺和产品失效的根本原因之一。因此，预测后端工艺引起的晶片翘曲的能力对于实现最佳IC设计和后端工艺是重要的。本文介绍了我们的研究结果的预测和实验验证的后端工艺引起的晶片翘曲，由于薄膜沉积和温度变化。分析和FE（有限元）方法都用于开发已确定的重要后端过程的预测模型。这两个模型进行了验证，通过专门设计的测试晶片的翘曲测量。预测与实验结果的比较表明，所研究的后端过程中的应力和翘曲的预测历史在定性上是可靠的。
During the back-end processes of wafer manufacturing, wafer warpage occurs due to the mismatch in thermal expansion coefficients of the various applied materials. Large wafer warpage is one of the root causes leading to process and product failures. Therefore, the ability to predict the back-end process induced wafer warpage is important to achieve an optimal IC design and back-end process. This paper presents our research results of prediction and experimental verification of back-end process-induced wafer warpage due to thin film deposition and temperature changes. Both analytical and FE (finite element) methods are used to develop predictive models of the identified important back-end processes. These two models are verified by conducting warpage measurements of specially designed test wafers. Comparisons between the predictions with experimental results show that the predicted history of stress and warpage during the studied back-end processes are qualitatively reliable.