Supporting temporal and spatial isolation in a hypervisor for ARM multicore platforms

Supporting temporal and spatial isolation in a hypervisor for ARM multicore platforms
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支持 ARM 多核平台的虚拟机管理程序中的时间和空间隔离

DOI:
10.1109/icit.2018.8352429
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发表时间:
2018
期刊:
2018 IEEE International Conference on Industrial Technology (ICIT)
影响因子:
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通讯作者:
Anup Patel
Anup Patel
中科院分区:
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文献类型:
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作者:
P. Modica;Alessandro Biondi;G. Buttazzo;Anup Patel

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本文解决了在ARM多核平台上运行的管理程序中的执行域之间提供空间和时间隔离的问题。隔离是通过仔细管理当今多功能平台的两个主要共享硬件资源来实现的:最后一级缓存(LLC)和DRAM内存控制器。 XVisor开源管理程序和ARM Cortex A7平台已被用作这项工作目的的参考系统。在LLC上的空间分区已通过缓存着色实施,该缓存着色已与ARM虚拟化扩展(ARM-VE)紧密整合,以处理由两阶段内存管理单元(MMU)提供的内存虚拟化功能。通过实现内存带宽预订机制,已实现了DRAM控制器上的时间隔离,该保留机制已与Hyprovisor的调度逻辑相结合。对流行的Raspberry Pi 2板进行了广泛的实验评估,显示了实施解决方案的有效性,该解决方案是由运行最新基准测试的多个Linux域组成的案例研究。
This paper addresses the problem of providing spatial and temporal isolation between execution domains in a hypervisor running on an ARM multicore platform. Isolation is achieved by carefully managing the two primary shared hardware resources of today's multicore platforms: the last-level cache (LLC) and the DRAM memory controller. The XVISOR open-source hypervisor and the ARM Cortex A7 platform have been used as reference systems for the purpose of this work. Spatial partitioning on the LLC has been implemented by means of cache coloring, which has been tightly integrated with the ARM virtualization extensions (ARM-VE) to deal with the memory virtualization capabilities offered by a two-stage memory management unit (MMU). Temporal isolation on the DRAM controller has been implemented by realizing a memory bandwidth reservation mechanism, which has been combined with the scheduling logic of the hypervisor. An extensive experimental evaluation has been performed on the popular Raspberry Pi 2 board, showing the effectiveness of the implemented solutions on a case-study composed of multiple Linux domains running state-of-the-art benchmarks.