An ultra-low-power wake-up receiver with voltage-multiplying self-mixer and interferer-enhanced sensitivity
An ultra-low-power wake-up receiver with voltage-multiplying self-mixer and interferer-enhanced sensitivity
复制标题
具有倍压自混频器和干扰增强灵敏度的超低功耗唤醒接收器
DOI：
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发表时间：
2017
期刊：
影响因子：
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通讯作者：
P. Kinget
中科院分区：
文献类型：
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作者：
Vivek Mangal;P. Kinget
采用0.13μm CMOS工艺实现的0.5V自混频器-第一级550 MHz 220 nW唤醒接收器在36.36kbps时具有−56.4dBm的灵敏度和6.1pJ/bit的功耗。采用弱反型MOS管的10级倍压自混频器功耗为2.7nW，在基带处提供多级转换增益。在采用−43.5dBm PM解调器的情况下，接收器中的备用1.1uW高频基带路径可提供−63.6dBm的增强灵敏度。
A 0.5V self-mixer-first 550MHz 220nW wake-up receiver in 0.13μm CMOS has a −56.4dBm sensitivity at 36.36kbps and an energy consumption of 6.1pJ/bit. A 10-stage voltage-multiplying self-mixer using MOS transistors in weak inversion consumes 2.7nW and offers multi-stage conversion gain at baseband. In the presence of a −43.5dBm PM interferer, the alternate 1.1uW high frequency baseband path in the receiver offers an enhanced sensitivity of −63.6dBm.