A Switched-Capacitor Front-End for Velocity-Selective ENG Recording
A Switched-Capacitor Front-End for Velocity-Selective ENG Recording
复制标题
用于速度选择性 ENG 记录的开关电容器前端
DOI：
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复制
发表时间：
2013
影响因子：
5.1
通讯作者：
John Taylor
中科院分区：
文献类型：
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作者：
R. Rieger;John Taylor
多电极袖口（mec）是一种从多电极记录中提取有关神经信号速度和方向的附加信息的方法。本文讨论了速度选择记录（VSR）系统实现的某些方面，其中多个神经信号匹配和求和以识别受激轴突种群的速度。本文概述的方法涉及用模拟开关电容器（SC）延迟线取代标准延迟匹配VSR系统的数字信号处理阶段，这在尺寸和功耗方面都有显着节省。推导了系统规格，并对两个电路进行了评估，每个电路由连接到二级SC增益级的低噪声前置放大器组成。其中一个系统提供单端SC级，而另一个系统是完全差分的。这两种方法都能提供低噪声、低功耗、几乎相同的通道增益和VSR所需的采样延迟范围。本文报道了采用0.8 μm CMOS工艺制作的芯片的测量结果。
Multi-electrode cuffs (MECs) have been proposed as a means for extracting additional information about the velocity and direction of nerve signals from multi-electrode recordings. This paper discusses certain aspects of the implementation of a system for velocity selective recording (VSR) where multiple neural signals are matched and summed to identify excited axon populations in terms of velocity. The approach outlined in the paper involves the replacement of the digital signal processing stages of a standard delay-matched VSR system with analogue switched-capacitor (SC) delay lines which promises significant savings in both size and power consumption. The system specifications are derived and two circuits, each composed of low-noise preamplifiers connecting to a 2nd rank SC gain stage, are evaluated. One of the systems provides a single-ended SC stage whereas the other system is fully differential. Both approaches are shown to provide the low-noise, low-power operation, practically identical channel gains and sample delay range required for VSR. Measured results obtained from chips fabricated in 0.8 μm CMOS technology are reported.