Study on subsurface damage of wafer silicon containing through silicon via in thinning
Study on subsurface damage of wafer silicon containing through silicon via in thinning
复制标题
含硅通孔晶圆减薄过程中亚表面损伤研究
DOI:
10.1140/epjp/i2019-12591-4
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发表时间:
2019
影响因子:
3.4
通讯作者:
He Liping
中科院分区:
文献类型:
--
作者:
Xu Yixin;Wang Miaocao;Zhu Fulong;Liu Xiaojian;Liu Yuhong;He Liping
Molecular Dynamics (MD) simulations are carried out to study the thinning mechanism of silicon wafer containing through silicon via (TSV) at different loading conditions. The nano-metric grinding process is explained by lattice slip and distortion induced by tool extrusion. When the grinding depth is relatively low, amorphous silicon will appear on the surface of the silicon. The nano-twin defects appear on the subsurface of the workpiece as the grinding depth reaches 1.5nm. We compared the depth of the defect at the Si-SiO2interface and inside the silicon. The results show that the nano-twins extend to the interface leading to a deeper damage. Between 40 and 100m/s, increasing the grinding speed can slightly reduce the depth of interface damage, while the defects inside the silicon are mainly affected by the grinding depth. Moreover, both normal and tangential force decrease with the increase of speed from 40 to 100m/s. The friction coefficient calculation results show that the larger the grinding depth, the larger the friction coefficient. Higher speeds reduce the friction coefficient of the diamond abrasive particles and the workpiece surface over the speed range from 40 to 100m/s. At last, the surface contact stress is calculated based on the actual contact surface. With the depth of 1.0nm, the contact stress is the largest,i.e.11.99GPa.