Neuromorphic Hardware System for Visual Pattern Recognition With Memristor Array and CMOS Neuron

Neuromorphic Hardware System for Visual Pattern Recognition With Memristor Array and CMOS Neuron
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DOI:
10.1109/tie.2014.2356439
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发表时间:
2015-04-01
影响因子:
7.7
通讯作者:
Lee, Byung-Geun
Lee, Byung-Geun
中科院分区:
计算机科学1区
文献类型:
--
作者:
Chu, Myonglae;Kim, Byoungho;Lee, Byung-Geun

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本文介绍了一个用硬件实现的神经形态视觉模式识别系统。一个新的学习规则的基础上修改尖峰时间依赖可塑性也提出和实现被动突触装置。该系统包括一个人工光感受器,Pr0.7Ca0.3MnO3为基础的忆阻器阵列,和CMOS神经元。由CMOS图像传感器和现场可编程门阵列组成的人工感光器将图像转换为尖峰信号,忆阻器阵列用于根据学习规则调整输入和输出神经元之间的突触权重。一个泄漏的积分和火灾模型被用于输出神经元,这是建立在一个单一的芯片上的图像传感器。该系统有30个输入神经元,通过300个忆阻器与10个输出神经元互连。对应于5x6像素图像中的像素的每个输入神经元根据像素值生成电压脉冲。电压脉冲然后分别由忆阻器和输出神经元加权和积分,以与输出神经元激发的特定阈值电压进行比较。该系统已成功地通过训练和识别数字图像从0到9。
This paper presents a neuromorphic system for visual pattern recognition realized in hardware. A new learning rule based on modified spike-timing-dependent plasticity is also presented and implemented with passive synaptic devices. The system includes an artificial photoreceptor, a Pr0.7Ca0.3MnO3-based memristor array, and CMOS neurons. The artificial photoreceptor consisting of a CMOS image sensor and a field-programmable gate array converts an image into spike signals, and the memristor array is used to adjust the synaptic weights between the input and output neurons according to the learning rule. A leaky integrate-and-fire model is used for the output neuron that is built together with the image sensor on a single chip. The system has 30 input neurons that are interconnected to 10 output neurons through 300 memristors. Each input neuron corresponding to a pixel in a 5 x 6 pixel image generates voltage pulses according to the pixel value. The voltage pulses are then weighted and integrated by the memristors and the output neurons, respectively, to be compared with a certain threshold voltage above which an output neuron fires. The system has been successfully demonstrated by training and recognizing number images from 0 to 9.