Predictive Control Using an FPGA With Application to Aircraft Control
Predictive Control Using an FPGA With Application to Aircraft Control
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DOI：
10.1109/tcst.2013.2271791
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发表时间：
2014-05-01
影响因子：
4.8
通讯作者：
Constantinides, George A.
中科院分区：
文献类型：
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作者：
Hartley, Edward Nicholas;Jerez, Juan Luis;Constantinides, George A.
替代和更有效的计算方法可以将模型预测控制（MPC）的适用性扩展到具有严格实时要求的系统。本文提出了一种基于现场可编程门阵列（FPGA）的片上系统MPC系统，该系统由用于MPC参考跟踪的稀疏结构利用原始对偶内点（PDIP）二次规划（QP）求解器和用于稳态目标计算的快速梯度QP求解器组成。采用并行降精度迭代求解器加速求解构成PDIP算法计算瓶颈的线性方程组。对减少迭代次数效果的数值研究突出了该方法的有效性。通过大型客机非线性仿真的fpga在环试验台对该系统进行了验证。本文考虑了比以往任何基于FPGA的MPC实现到目前为止更多的操纵输入，但实现舒适地适合中档FPGA，并且控制器在解决方案质量和延迟方面与运行在标准PC上的最先进的QP求解器相比较。
Alternative and more efficient computational methods can extend the applicability of model predictive control (MPC) to systems with tight real-time requirements. This paper presents a system-on-a-chip MPC system, implemented on a field-programmable gate array (FPGA), consisting of a sparse structure-exploiting primal dual interior point (PDIP) quadratic program (QP) solver for MPC reference tracking and a fast gradient QP solver for steady-state target calculation. A parallel reduced precision iterative solver is used to accelerate the solution of the set of linear equations forming the computational bottleneck of the PDIP algorithm. A numerical study of the effect of reducing the number of iterations highlights the effectiveness of the approach. The system is demonstrated with an FPGA-in-the-loop testbench controlling a nonlinear simulation of a large airliner. This paper considers many more manipulated inputs than any previous FPGA-based MPC implementation to date, yet the implementation comfortably fits into a midrange FPGA, and the controller compares well in terms of solution quality and latency to state-of-the-art QP solvers running on a standard PC.