A 0.096-mm $^{2}~1$ –20-GHz Triple-Path Noise- Canceling Common-Gate Common-Source LNA With Dual Complementary pMOS–nMOS Configuration
A 0.096-mm $^{2}~1$ –20-GHz Triple-Path Noise- Canceling Common-Gate Common-Source LNA With Dual Complementary pMOS–nMOS Configuration
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DOI：
10.1109/tmtt.2019.2949796
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发表时间：
2020-01
影响因子：
4.3
通讯作者：
Haohong Yu;Yong Chen;C. Boon;Pui-in Mak;R. Martins
中科院分区：
文献类型：
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作者：
Haohong Yu;Yong Chen;C. Boon;Pui-in Mak;R. Martins
本文提出了一种新颖的宽带共栅共源低噪声放大器（LNA），采用双互补pMOS-nMOS结构，提供电流复用输出。三路径噪声消除有效地揭示了消除的两个CG晶体管的热噪声。同时，输出级晶体管的固有三阶失真的部分消除改善了输入三阶截点（IIP 3）。此外，我们在其中一个辅助CS放大器中嵌入了阻性反馈，以平衡噪声系数（NF）、输入匹配（S11）和前向增益（S21）之间的多重权衡。该宽带LNA采用65 nm CMOS工艺制造，IIP 3为2.2-6.8 dBm，NF为3.3-5.3 dB，带宽为19 GHz，功耗为20.3 mW（1.6 V）。S11为$\pi $型输入匹配网络。LNA具有12.8 dB的峰值$\text{S}_{\vphantom {D_{j}}21}$，并且占用0.096 mm 2的非常紧凑的管芯面积。
This article proposes a novel wideband common-gate (CG) common-source (CS) low-noise amplifier (LNA) with a dual complementary pMOS–nMOS configuration to provide a current-reuse output. Triple-path noise-cancellation is effectively revealed to eliminate the thermal noise of the two CG transistors. Simultaneously, partial cancellation of intrinsic third-order distortion of output-stage transistors improves the input third-order intercept point (IIP3). In addition, we embed a resistive feedback in one of the auxiliary CS amplifiers to balance the multiple tradeoffs between noise figure (NF), input matching (S11), and forward gain (S21). Fabricated in 65-nm CMOS, the proposed wideband LNA exhibits an IIP3 of 2.2–6.8 dBm and an NF of 3.3–5.3 dB across a 19-GHz BW while consuming 20.3 mW at 1.6 V. S11 is $\pi $ -type input-matching network. The LNA exhibits a peak $\text{S}_{\vphantom {D_{j}}21}$ of 12.8 dB and occupies a very compact die area of 0.096 mm2.