Non-contact Metrology for mm-Wave and THz Electronics
Non-contact Metrology for mm-Wave and THz Electronics
复制标题
毫米波和太赫兹电子的非接触式计量
DOI:
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发表时间:
2019
期刊:
影响因子:
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通讯作者:
G. Trichopoulos
中科院分区:
文献类型:
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作者:
K. Sertel;G. Trichopoulos
We present a novel non-contact probing approach for on-wafer metrology of high-speed devices and integrated circuits. The new method has been developed under the ONR DATE MURI and enables, for the first time, contact-free multi-port S-parameter measurements on-wafer. The main motivation to develop this new method was the inherent issues in the state-of-the-art contact probes, particularly for the millimeter wave and terahertz frequency applications. As the operation frequency increases, the pitch of contact probe tips must be kept small to avoid radiation losses. As such, the probe tips require high precision micro-manufacturing, making them prone to damage during conventional use. Moreover, probe positioning and contact resistance variability hinder measurement repeatability, which is critical for extremely high-frequency applications. The non-contact probing system developed here avoids physical contact with the test wafer by injecting the test signals via a quasi-optical link through an extended hemispherical focusing lens onto the test wafer’s coplanar waveguide environment. Optimized on-wafer butterfly antennas ensure effective radiative coupling onto and out of the test wafer, and the quasi-optical link stays fixed during calibration and measurements. Calibration standards and the test devices on wafer are aligned with the quasi-optical link to conduct the measurements on a vector network analyzer. Furthermore, the control of wafer positioning can be automated using a digital microscope, enabling unprecedented measurement repeatability. We have demonstrated our new approach for 90–750GHz band for single-ended two-port CPW environments. Using modified butterfly baluntennas, our approach also enables, for the first time, pure differential-mode characterization up to 1.1THz. This chapter summarizes the proposed system and its performance for various on-wafer test scenarios.