Experimental Evidence Toward Understanding Charge Pumping Signals in 3-D Devices With Poly-Si Channel
Experimental Evidence Toward Understanding Charge Pumping Signals in 3-D Devices With Poly-Si Channel
复制标题
DOI：
10.1109/ted.2014.2313038
复制
发表时间：
2014-04
影响因子：
3.1
通讯作者：
B. Tang;Weidong Zhang;M. Toledano-Luque;J. Zhang;R. Degraeve;Z. Ji;A. Arreghini;G. Van den bosch;J. van Houdt
中科院分区：
文献类型：
--
作者：
B. Tang;Weidong Zhang;M. Toledano-Luque;J. Zhang;R. Degraeve;Z. Ji;A. Arreghini;G. Van den bosch;J. van Houdt
三维闪存器件中使用的多晶硅（p-Si）沟道是导致器件性能下降的主要原因，如高界面态密度。本文采用变幅电荷泵技术分析了具有p型硅沟道的三维纳米垂直器件中的电荷泵信号。首次从实验上证明了宽CP边是由于界面态俘获和源/漏p-n结扩散引起的p-Si沟道阈值电压变化所致，它们的影响可以分别评价。隧道FET工作模式中的热载流子应力和统计分析被用来提供支持证据。
Poly-Si (p-Si) channel used in 3-D Flash memory devices is the main source of degraded performance, such as the high interface state density. Charge pumping (CP) signals in the 3-D nanoscale vertical device with p-Si channel are analyzed in this paper using the variable amplitude CP technique. For the first time, it has been demonstrated experimentally that the broad CP edge is due to the threshold voltage variation in the p-Si channel caused by both the trapping in interface states and the source/drain p-n junction diffusion, and their impacts can be separately evaluated. Hot carrier stress in the tunneling FET operation modes and statistical analysis are used to provide supporting evidence.