Timing jitter and bit errors in a 64-bit circular shift register
Timing jitter and bit errors in a 64-bit circular shift register
复制标题
64 位循环移位寄存器中的时序抖动和位错误
DOI:
10.1109/77.783836
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发表时间:
1999
影响因子:
1.8
通讯作者:
M. Bocko
中科院分区:
文献类型:
--
作者:
A. M. Herr;M. Feldman;M. Bocko
The bit-error rate of a 64-bit single-flux-quantum circular shift register, operating at a clock frequency of 10-16 GHz was measured. Error incidence depends on the values of the clock and data bias currents and on the clock frequency. Timing violation arising from thermal jitter is the dominant error mechanism. The jitter per JTL stage is estimated to be 290 fs based on the error rate data. This corresponds to a noise temperature of 8-9 K.