Ultralow ON-Resistance High-Voltage p-Channel LDMOS With an Accumulation-Effect Extended Gate
Ultralow ON-Resistance High-Voltage p-Channel LDMOS With an Accumulation-Effect Extended Gate
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具有累积效应扩展栅极的超低导通电阻高压 p 沟道 LDMOS
DOI：
10.1109/ted.2016.2555327
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发表时间：
2016-06-01
影响因子：
3.1
通讯作者：
Zhang, Bo
中科院分区：
文献类型：
--
作者：
Luo, Xiaorong;Tan, Qiao;Zhang, Bo
高导通电阻和有限击穿电压（BV）是p沟道横向双扩散MOSFET （pLDMOS）的两个主要问题。为了解决这两个问题，提出了一种具有改进BV的超低比导通电阻（R-ON,R-sp） pLDMOS，并进行了仿真研究。它具有在漂移区具有累积效应的扩展栅极（EG）和N-sub中的P+浮动层（PFL）。在导通状态下，EG沿漂移区表面诱导出空穴积累层，提供了一个超低阻的导电路径。这种累加型电流输运模式使得R-ON，R-sp几乎与漂移区掺杂浓度（N-d）无关，使得R-ON，R-sp大大降低，大大突破了R-ON sp与BV2.5成正比的硅极限。在off状态下，EG不仅通过调节表面电场（e场）分布来提高BV，而且通过消耗漂移区来增加优化N-d，从而进一步降低R-ON，R-sp。此外，PFL没有耗尽，因此在横向方向上是等电位的。因此，PFL不仅可以调制源侧和漏侧的体电场分布，还可以引入一个额外的垂直二极管来维持更高的BV。由于上述影响，仿真结果表明，与传统pLDMOS相比，EG PFL pLDMOS的R-ON、R-sp降低了68%，BV提高了47%。
The high ON-resistance and the limited breakdown voltage (BV) are the two major issues for the p-channel lateral double-diffused MOSFET (pLDMOS). To solve the two issues, an ultralow specific ON-resistance (R-ON,R-sp) pLDMOS with improved BV is proposed and investigated by simulation. It features an extended gate (EG) with accumulation effect over the drift region and a P+ floating layer (PFL) in the N-sub. In the ON-state, the EG induces the hole accumulation layer along the drift region surface, providing an ultralow-resistance conducting path. This accumulation-type current transport mode makes R-ON,R-sp almost independent of the drift region doping concentration (N-d) and contributes to a much lower R-ON,R-sp, which greatly breaks through the silicon limit of R-ON sp proportional to BV2.5. In the OFF-state, the EG not only modulates the surface electric field (E-field) distribution to enhance the BV, but also helps deplete the drift region to increase the optimized N-d, and thus further reduce R-ON,R-sp. Moreover, the PFL is not depleted, and thus equipotential in the lateral direction. Therefore, the PFL not only modulates the bulk E-field distribution at the source and drain sides but also introduces an additional vertical diode to sustain a higher BV. Owing to the effects mentioned above, the simulated results show that the EG PFL pLDMOS decreases R-ON,R-sp by 68% and increases the BV by 47% compared with the conventional pLDMOS.