Express Ring: a multi-layer and non-blocking NoC architecture

Express Ring: a multi-layer and non-blocking NoC architecture
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DOI:
10.1587/elex.12.20141190
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发表时间:
2015-01
期刊:
IEICE Electron. Express
影响因子:
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通讯作者:
Chen Li;Sheng Ma;Shenggang Chen;Yang Guo;Peng Wang
Chen Li;Sheng Ma;Shenggang Chen;Yang Guo;Peng Wang
中科院分区:
其他
文献类型:
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作者:
Chen Li;Sheng Ma;Shenggang Chen;Yang Guo;Peng Wang

文献摘要

相似文献

由于片上网络(NoC)带来了巨大的硬件开销,它已成为系统片上系统(SoC)设计的性能和可扩展性瓶颈。为了解决这一挑战,我们提出了一种多层非阻塞环形NoC架构。不同带宽的多层链路可以实现高链路利用率,避免协议级死锁。非阻塞架构利用无缓冲路由器来减少硬件开销,并简化路由器管道以减少零负载延迟。我们还提出了一种可扩展的全局信号控制机制,以消除饥饿和避免数据包丢失。与由日期线路由器(DRing)组成的传统环网和Intel Nehalem-EX环网(NRing)相比,我们的设计分别实现了69.4%和12.3%的性能提升。与DRing相比,它还减少了硬件开销。
As the Network-on-Chip (NoC) induces significant hardware overheads, it becomes the performance and scalability bottleneck of Systemon-Chip (SoC) design. To address this challenge, we propose a multi-layer, non-blocking ring NoC architecture. Multi-layer links with different bandwidth achieve high link utilization and avoid protocol-level deadlock. The non-blocking architecture leverages bufferless router to reduce hardware overheads and simplifies router pipeline to reduce zero-load latency. We also propose a scalable global signal control mechanism to eliminate the starvation and avoid the loss of packets. Compared with the conventional ring network composed of dateline routers (DRing) and Intel Nehalem-EX ring network (NRing), our design achieves 69.4% and 12.3% performance improvements, respectively. Compared with DRing, it also reduces hardware overheads.