Express Ring: a multi-layer and non-blocking NoC architecture
Express Ring: a multi-layer and non-blocking NoC architecture
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DOI:
10.1587/elex.12.20141190
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发表时间:
2015-01
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通讯作者:
Chen Li;Sheng Ma;Shenggang Chen;Yang Guo;Peng Wang
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文献类型:
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作者:
Chen Li;Sheng Ma;Shenggang Chen;Yang Guo;Peng Wang
As the Network-on-Chip (NoC) induces significant hardware overheads, it becomes the performance and scalability bottleneck of Systemon-Chip (SoC) design. To address this challenge, we propose a multi-layer, non-blocking ring NoC architecture. Multi-layer links with different bandwidth achieve high link utilization and avoid protocol-level deadlock. The non-blocking architecture leverages bufferless router to reduce hardware overheads and simplifies router pipeline to reduce zero-load latency. We also propose a scalable global signal control mechanism to eliminate the starvation and avoid the loss of packets. Compared with the conventional ring network composed of dateline routers (DRing) and Intel Nehalem-EX ring network (NRing), our design achieves 69.4% and 12.3% performance improvements, respectively. Compared with DRing, it also reduces hardware overheads.