Work-in-Progress: NoRF: A Case Against Register File Operands in Tightly-Coupled Accelerators

Work-in-Progress: NoRF: A Case Against Register File Operands in Tightly-Coupled Accelerators
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DOI:
10.1109/cases55004.2022.00028
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发表时间:
2022-10
期刊:
2022 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES)
影响因子:
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通讯作者:
David J. Schlais;Heng Zhuo;Mikko H. Lipasti
David J. Schlais;Heng Zhuo;Mikko H. Lipasti
中科院分区:
其他
文献类型:
--
作者:
David J. Schlais;Heng Zhuo;Mikko H. Lipasti

文献摘要

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加速器通常用于提高通用CPU的性能和/或能效。然而,紧耦合加速器(TCA)通常在可能不适合通用寄存器的数据结构上执行计算。设计者既可以使用现有的寄存器堆(RF),即为加速器量身定做的RF,也可以完全避免使用RF(NORF),直接从存储器层次结构访问操作数。嵌入式和边缘设备的设计者尤其注重节能计算和数据传输。我们探索了在CPU和边缘设备的环境中使用迷你DGEMM加速器(例如TCA)的可能性,这些处理器和边缘设备也越来越多地应用于DGEMM计算。在较高级别,当编译器发现在程序数据流中重复使用操作数时,寄存器堆有助于减少内存访问(图1中的步骤1、2、5和6)。另一方面,直接内存访问通过完全消除对寄存器堆的中间读写操作简化了数据移动,但会发出更多的内存请求。本文评估了这两种操作数传递选项之间的差异。图2显示所有最近的矢量扩展都使用寄存器堆实现。按照这种趋势,将迷你矩阵合并到射频中似乎是很自然的。然而,我们提供了定量和定性的证据来支持操作数的直接高速缓存访问。
Accelerators are often used to increase performance and/or energy efficiency of general-purpose CPUs. However, Tightly-Coupled Accelerators (TCAs) often perform computations on data structures that may not be a natural fit for general-purpose registers. The designer can either use the existing register file (RF), a RF tailored for the accelerator, or eschew a RF entirely (NoRF), accessing operands directly from the memory hierarchy. Designers for embedded and edge devices are particularly conscientious towards energy-efficient compute and data transfer. We explore the possibility of mini-DGEMM accelerators (example TCAs) within the context of CPUs and edge devices, which also have increasing applications for DGEMM compute. At a high level, register files help reduce memory accesses (steps 1, 2, 5, and 6 in Figure 1 ) when the compiler finds reuse of operands in the program dataflow. On the other hand, direct memory access simplifies the data movement by completely eliminating the intermediate reads and writes to a register file but issues more memory requests. This paper evaluates the difference between these options of operand delivery. Figure 2 shows that all recent vector extensions use a register file implementation. By this trend, it may seem natural to incorporate mini-matrices into the RF. However, we present quantitative and qualitative evidence to advocate for direct cache access for operands.