iPIM: Programmable In-Memory Image Processing Accelerator Using Near-Bank Architecture
iPIM: Programmable In-Memory Image Processing Accelerator Using Near-Bank Architecture
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DOI：
10.1109/isca45697.2020.00071
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发表时间：
2020-05
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影响因子：
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通讯作者：
P. Gu;Xinfeng Xie;Yufei Ding;Guoyang Chen;Weifeng Zhang;Dimin Niu;Yuan Xie
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文献类型：
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作者：
P. Gu;Xinfeng Xie;Yufei Ding;Guoyang Chen;Weifeng Zhang;Dimin Niu;Yuan Xie
对于工作站和数据中心的许多应用程序来说，图像处理正在成为一个越来越重要的领域，这些应用程序需要加速器来实现高性能和能效。GPU是最先进的图像处理加速器，受到内存带宽瓶颈的困扰。为了解决这一瓶颈，由于其巨大的银行内部带宽和低能量存储器访问，近银行架构提供了一个有前途的解决方案。然而，以前的工作缺乏硬件可编程性，而图像处理工作负载包含许多具有不同计算和内存访问模式的异构管道阶段。实现低硬件开销的可编程近银行架构仍然具有挑战性。这项工作提出了iPIM，第一个使用近岸架构的可编程内存图像处理加速器。我们首先设计了一个解耦的控制执行架构来提供轻量级的可编程性支持。其次，我们提出了SIMB（单指令多银行）ISA，以实现灵活的控制流和数据访问。第三，我们提出了一个基于Halide的端到端编译流，它支持广泛的图像处理应用程序，并将它们映射到我们的SIMB ISA。我们进一步开发了支持ipim的编译器优化，包括寄存器分配、指令重排序和内存顺序强制，以提高性能。我们在iPIM上评估了一组具有代表性的图像处理应用，并证明iPIM比NVIDIA Tesla V100 GPU平均获得11.02倍的加速和79.49%的节能。进一步的分析表明，与未优化的基线相比，我们的编译器优化贡献了3.19倍的加速。
Image processing is becoming an increasingly important domain for many applications on workstations and the datacenter that require accelerators for high performance and energy efficiency. GPU, which is the state-of-the-art accelerator for image processing, suffers from the memory bandwidth bottleneck. To tackle this bottleneck, near-bank architecture provides a promising solution due to its enormous bank-internal bandwidth and low-energy memory access. However, previous work lacks hardware programmability, while image processing workloads contain numerous heterogeneous pipeline stages with diverse computation and memory access patterns. Enabling programmable near-bank architecture with low hardware overhead remains challenging.This work proposes iPIM, the first programmable in-memory image processing accelerator using near-bank architecture. We first design a decoupled control-execution architecture to provide lightweight programmability support. Second, we propose the SIMB (Single-Instruction-Multiple-Bank) ISA to enable flexible control flow and data access. Third, we present an end-to-end compilation flow based on Halide that supports a wide range of image processing applications and maps them to our SIMB ISA. We further develop iPIM-aware compiler optimizations, including register allocation, instruction reordering, and memory order enforcement to improve performance. We evaluate a set of representative image processing applications on iPIM and demonstrate that on average iPIM obtains 11.02× acceleration and 79.49% energy saving over an NVIDIA Tesla V100 GPU. Further analysis shows that our compiler optimizations contribute 3.19× speedup over the unoptimized baseline.