STRIVE: Enabling Choke Point Detection and Timing Error Resilience in a Low-Power Tensor Processing Unit
STRIVE: Enabling Choke Point Detection and Timing Error Resilience in a Low-Power Tensor Processing Unit
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DOI：
10.1109/dac56929.2023.10247879
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发表时间：
2023-07
期刊：
影响因子：
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通讯作者：
N. D. Gundi;Z. Mowri;Andrew Chamberlin;Sanghamitra Roy;Koushik Chakraborty
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文献类型：
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作者：
N. D. Gundi;Z. Mowri;Andrew Chamberlin;Sanghamitra Roy;Koushik Chakraborty
深度神经网络 (DNN) 工作负载的快速增长增加了人工智能 (AI) 计算领域的能源足迹。为了获得最佳能源效率，我们建议在低功耗计算 (LPC) 区域运行 DNN 硬件。然而，在 LPC 下运行会导致对过程变化 (PV) 的延迟敏感性增加。延迟故障是 PV 的一个有趣的后果。在本文中，我们证明了 DNN 容易受到延迟变化的影响，从而大大降低了预测精度。为了克服延迟故障，我们提出了 STRIVE——一种制造后故障检测和反应性误差减少技术。我们还引入了时间借用校正技术来确保 DNN 计算无错误。
Rapid growth in Deep Neural Network (DNN) workloads has increased the energy footprint of the Artificial Intelligence (AI) computing realm. For optimum energy efficiency, we propose operating a DNN hardware in the Low-Power Computing (LPC) region. However, operating at LPC causes increased delay sensitivity to Process Variation (PV). Delay faults are an intriguing consequence of PV. In this paper, we demonstrate the vulnerability of DNNs to delay variations, substantially lowering the prediction accuracy. To overcome delay faults, we present STRIVE—a post-fabrication fault detection and reactive error reduction technique. We also introduce a time-borrow correction technique to ensure error-free DNN computation.