A taxonomy of accelerator architectures and their programming models
A taxonomy of accelerator architectures and their programming models
复制标题
加速器架构及其编程模型的分类
DOI：
--
复制
发表时间：
2010
影响因子：
1.3
通讯作者：
P. Pattnaik
中科院分区：
文献类型：
--
作者：
Calin Cascaval;S. Chatterjee;H. Franke;K. Gildea;P. Pattnaik
随着硅芯片的时钟频率正在升级，计算机体系结构社区正在寻找不同的解决方案来继续应用程序性能扩展。这样的解决方案是多核方法方法，即使用比宽SuperScalar处理器更高的性能更高的简单核心，前提是工作负载可以利用并行性。另一个新兴的替代方法是在系统内不同级别的定制设计（加速器）使用。这些是与核心，专门内核，附加处理器或附件的专门功能单元。设计折衷是非常引人注目的，因为当前的处理器芯片具有数十亿个晶体管，但是不能以高频同时激活或切换它们。专业设计提供了提高的功率效率，但不能用作通用计算发动机。因此，建筑师贸易领域提高了功率效率，将其放置在设计的其他单元中，这些单元已知在不同时间处于活动状态。最终的系统是一个异质体系结构，具有专门执行的潜力，可以加速不同的工作负载。虽然设计和构建此类硬件系统具有吸引力，但对于同质多层系统而言，编写和移植软件比并行性更具挑战性。在本文中，我们提出了一种分类法，使我们能够定义一类加速器，目的是专注于一小部分加速器编程模型。我们讨论了几种当前流行的加速器的几种类型，并确定了在当前软件堆栈中利用此类加速器的挑战。本文通过为软件如何最好地利用专业化和软件程序员的方式来了解这两个硬件设计师的指南，以解决并行的研究工作来解决并行性和异质性。
As the clock frequency of silicon chips is leveling off, the computer architecture community is looking for different solutions to continue application performance scaling. One such solution is the multicore approach, i.e., using multiple simple cores that enable higher performance than wide superscalar processors, provided that the workload can exploit the parallelism. Another emerging alternative is the use of customized designs (accelerators) at different levels within the system. These are specialized functional units integrated with the core, specialized cores, attached processors, or attached appliances. The design tradeoff is quite compelling because current processor chips have billions of transistors, but they cannot all be activated or switched at the same time at high frequencies. Specialized designs provide increased power efficiency but cannot be used as general-purpose compute engines. Therefore, architects trade area for power efficiency by placing in the design additional units that are known to be active at different times. The resulting system is a heterogeneous architecture, with the potential of specialized execution that accelerates different workloads. While designing and building such hardware systems is attractive, writing and porting software to a heterogeneous platform is even more challenging than parallelism for homogeneous multicore systems. In this paper, we propose a taxonomy that allows us to define classes of accelerators, with the goal of focusing on a small set of programming models for accelerators. We discuss several types of currently popular accelerators and identify challenges to exploiting such accelerators in current software stacks. This paper serves as a guide for both hardware designers by providing them with a view on how software best exploits specialization and software programmers by focusing research efforts to address parallelism and heterogeneity.